diff options
Diffstat (limited to 'src/gallium/drivers/r600/r600_blit.c')
-rw-r--r-- | src/gallium/drivers/r600/r600_blit.c | 59 |
1 files changed, 18 insertions, 41 deletions
diff --git a/src/gallium/drivers/r600/r600_blit.c b/src/gallium/drivers/r600/r600_blit.c index aca37730233..e32e5c18401 100644 --- a/src/gallium/drivers/r600/r600_blit.c +++ b/src/gallium/drivers/r600/r600_blit.c @@ -1,25 +1,8 @@ /* * Copyright 2010 Jerome Glisse <glisse@freedesktop.org> - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * on the rights to use, copy, modify, merge, publish, distribute, sub - * license, and/or sell copies of the Software, and to permit persons to whom - * the Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL - * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, - * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR - * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. + * SPDX-License-Identifier: MIT */ + #include "r600_pipe.h" #include "compute_memory_pool.h" #include "evergreen_compute.h" @@ -59,7 +42,8 @@ static void r600_blitter_begin(struct pipe_context *ctx, enum r600_blitter_op op rctx->cmd_buf_is_compute = false; } - util_blitter_save_vertex_buffer_slot(rctx->blitter, rctx->vertex_buffer_state.vb); + util_blitter_save_vertex_buffers(rctx->blitter, rctx->vertex_buffer_state.vb, + util_last_bit(rctx->vertex_buffer_state.enabled_mask)); util_blitter_save_vertex_elements(rctx->blitter, rctx->vertex_fetch_shader.cso); util_blitter_save_vertex_shader(rctx->blitter, rctx->vs_shader); util_blitter_save_geometry_shader(rctx->blitter, rctx->gs_shader); @@ -76,7 +60,9 @@ static void r600_blitter_begin(struct pipe_context *ctx, enum r600_blitter_op op util_blitter_save_blend(rctx->blitter, rctx->blend_state.cso); util_blitter_save_depth_stencil_alpha(rctx->blitter, rctx->dsa_state.cso); util_blitter_save_stencil_ref(rctx->blitter, &rctx->stencil_ref.pipe_state); - util_blitter_save_sample_mask(rctx->blitter, rctx->sample_mask.sample_mask); + util_blitter_save_sample_mask(rctx->blitter, rctx->sample_mask.sample_mask, rctx->ps_iter_samples); + util_blitter_save_fragment_constant_buffer_slot(rctx->blitter, + &rctx->constbuf_state[PIPE_SHADER_FRAGMENT].cb[0]); } if (op & R600_SAVE_FRAMEBUFFER) @@ -131,7 +117,7 @@ static void r600_blit_decompress_depth(struct pipe_context *ctx, /* XXX Decompressing MSAA depth textures is broken on R6xx. * There is also a hardlock if CMASK and FMASK are not present. * Just skip this until we find out how to fix it. */ - if (rctx->b.chip_class == R600 && max_sample > 0) { + if (rctx->b.gfx_level == R600 && max_sample > 0) { texture->dirty_level_mask = 0; return; } @@ -197,7 +183,7 @@ static void r600_blit_decompress_depth(struct pipe_context *ctx, } } - /* reenable compression in DB_RENDER_CONTROL */ + /* re-enable compression in DB_RENDER_CONTROL */ rctx->db_misc_state.flush_depthstencil_through_cb = false; r600_mark_atom_dirty(rctx, &rctx->db_misc_state.atom); } @@ -470,7 +456,7 @@ static void r600_clear(struct pipe_context *ctx, unsigned buffers, struct r600_context *rctx = (struct r600_context *)ctx; struct pipe_framebuffer_state *fb = &rctx->framebuffer.state; - if (buffers & PIPE_CLEAR_COLOR && rctx->b.chip_class >= EVERGREEN) { + if (buffers & PIPE_CLEAR_COLOR && rctx->b.gfx_level >= EVERGREEN) { evergreen_do_fast_color_clear(&rctx->b, fb, &rctx->framebuffer.atom, &buffers, NULL, color); if (!buffers) @@ -573,19 +559,10 @@ static void r600_copy_buffer(struct pipe_context *ctx, struct pipe_resource *dst { struct r600_context *rctx = (struct r600_context*)ctx; - if (rctx->screen->b.has_cp_dma) { + if (rctx->screen->b.has_cp_dma) r600_cp_dma_copy_buffer(rctx, dst, dstx, src, src_box->x, src_box->width); - } - else if (rctx->screen->b.has_streamout && - /* Require 4-byte alignment. */ - dstx % 4 == 0 && src_box->x % 4 == 0 && src_box->width % 4 == 0) { - - r600_blitter_begin(ctx, R600_COPY_BUFFER); - util_blitter_copy_buffer(rctx->blitter, dst, dstx, src, src_box->x, src_box->width); - r600_blitter_end(ctx); - } else { + else util_resource_copy_region(ctx, dst, 0, dstx, 0, 0, src, 0, src_box); - } } /** @@ -648,7 +625,7 @@ static void r600_clear_buffer(struct pipe_context *ctx, struct pipe_resource *ds struct r600_context *rctx = (struct r600_context*)ctx; if (rctx->screen->b.has_cp_dma && - rctx->b.chip_class >= EVERGREEN && + rctx->b.gfx_level >= EVERGREEN && offset % 4 == 0 && size % 4 == 0) { evergreen_cp_dma_clear_buffer(rctx, dst, offset, size, value, coher); } else if (rctx->screen->b.has_streamout && offset % 4 == 0 && size % 4 == 0) { @@ -796,7 +773,7 @@ void r600_resource_copy_region(struct pipe_context *ctx, dst->width0, dst->height0, dst_width, dst_height); - if (rctx->b.chip_class >= EVERGREEN) { + if (rctx->b.gfx_level >= EVERGREEN) { src_view = evergreen_create_sampler_view_custom(ctx, src, &src_templ, src_width0, src_height0, src_force_level); @@ -813,7 +790,7 @@ void r600_resource_copy_region(struct pipe_context *ctx, util_blitter_blit_generic(rctx->blitter, dst_view, &dstbox, src_view, src_box, src_width0, src_height0, PIPE_MASK_RGBAZS, PIPE_TEX_FILTER_NEAREST, NULL, - FALSE, FALSE); + false, false, 0); r600_blitter_end(ctx); pipe_surface_reference(&dst_view, NULL); @@ -829,7 +806,7 @@ static bool do_hardware_msaa_resolve(struct pipe_context *ctx, unsigned dst_height = u_minify(info->dst.resource->height0, info->dst.level); enum pipe_format format = info->src.format; unsigned sample_mask = - rctx->b.chip_class == CAYMAN ? ~0 : + rctx->b.gfx_level == CAYMAN ? ~0 : ((1ull << MAX2(1, info->src.resource->nr_samples)) - 1); struct pipe_resource *tmp, templ; struct pipe_blit_info blit; @@ -933,7 +910,7 @@ static void r600_blit(struct pipe_context *ctx, if (rdst->surface.u.legacy.level[info->dst.level].mode == RADEON_SURF_MODE_LINEAR_ALIGNED && rctx->b.dma_copy && - util_can_blit_via_copy_region(info, false)) { + util_can_blit_via_copy_region(info, false, rctx->b.render_cond != NULL)) { rctx->b.dma_copy(ctx, info->dst.resource, info->dst.level, info->dst.box.x, info->dst.box.y, info->dst.box.z, @@ -953,7 +930,7 @@ static void r600_blit(struct pipe_context *ctx, } if (rctx->screen->b.debug_flags & DBG_FORCE_DMA && - util_try_blit_via_copy_region(ctx, info)) + util_try_blit_via_copy_region(ctx, info, rctx->b.render_cond != NULL)) return; r600_blitter_begin(ctx, R600_BLIT | |