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-rw-r--r--src/gallium/drivers/vc4/vc4_qir_schedule.c4
-rw-r--r--src/gallium/drivers/vc4/vc4_tiling.c8
2 files changed, 6 insertions, 6 deletions
diff --git a/src/gallium/drivers/vc4/vc4_qir_schedule.c b/src/gallium/drivers/vc4/vc4_qir_schedule.c
index 8b843a3a158..4a1283c5718 100644
--- a/src/gallium/drivers/vc4/vc4_qir_schedule.c
+++ b/src/gallium/drivers/vc4/vc4_qir_schedule.c
@@ -80,8 +80,8 @@ struct schedule_state {
enum direction { F, R };
/**
- * Marks a dependency between two intructions, that @after must appear after
- * @before.
+ * Marks a dependency between two intructions, that \p after must appear after
+ * \p before.
*
* Our dependencies are tracked as a DAG. Since we're scheduling bottom-up,
* the latest instructions with nothing left to schedule are the DAG heads,
diff --git a/src/gallium/drivers/vc4/vc4_tiling.c b/src/gallium/drivers/vc4/vc4_tiling.c
index 2a803ab62ba..4bcb85b16f5 100644
--- a/src/gallium/drivers/vc4/vc4_tiling.c
+++ b/src/gallium/drivers/vc4/vc4_tiling.c
@@ -269,8 +269,8 @@ vc4_store_t_image(void *dst, uint32_t dst_stride,
}
/**
- * Loads pixel data from the start (microtile-aligned) box in @src to the
- * start of @dst according to the given tiling format.
+ * Loads pixel data from the start (microtile-aligned) box in \p src to the
+ * start of \p dst according to the given tiling format.
*/
void
vc4_load_tiled_image(void *dst, uint32_t dst_stride,
@@ -293,8 +293,8 @@ vc4_load_tiled_image(void *dst, uint32_t dst_stride,
}
/**
- * Stores pixel data from the start of @src into a (microtile-aligned) box in
- * @dst according to the given tiling format.
+ * Stores pixel data from the start of \p src into a (microtile-aligned) box in
+ * \p dst according to the given tiling format.
*/
void
vc4_store_tiled_image(void *dst, uint32_t dst_stride,