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authorJosé Fonseca <jfonseca@vmware.com>2010-04-20 10:19:42 +0200
committerJosé Fonseca <jfonseca@vmware.com>2010-04-20 10:19:42 +0200
commitf1d3f42c47ee0d3c5f13f5b30e6b113d6b542f64 (patch)
tree2473998272aebd4b771175a42b7ead299c7d2885 /src
parentdfadf5a579281c6dd4ecdd4ecd5568fbbb1de17e (diff)
draw: Fix typo resulting from bad regular expression in index bias addition.
Diffstat (limited to 'src')
-rw-r--r--src/gallium/auxiliary/draw/draw_pt_vcache_tmp.h8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/gallium/auxiliary/draw/draw_pt_vcache_tmp.h b/src/gallium/auxiliary/draw/draw_pt_vcache_tmp.h
index eedd31b7f85..f7a63de3ba9 100644
--- a/src/gallium/auxiliary/draw/draw_pt_vcache_tmp.h
+++ b/src/gallium/auxiliary/draw/draw_pt_vcache_tmp.h
@@ -78,16 +78,16 @@ static void FUNC( struct draw_pt_front_end *frontend,
TRIANGLE( vcache,
DRAW_PIPE_RESET_STIPPLE | DRAW_PIPE_EDGE_FLAG_ALL,
get_elt(elts, i + 0) + elt_bias,
- get_elt(elts, i + 1 + (i&1) + elt_bias),
- get_elt(elts, i + 2 - (i&1) + elt_bias));
+ get_elt(elts, i + 1 + (i&1)) + elt_bias,
+ get_elt(elts, i + 2 - (i&1)) + elt_bias);
}
}
else {
for (i = 0; i+2 < count; i++) {
TRIANGLE( vcache,
DRAW_PIPE_RESET_STIPPLE | DRAW_PIPE_EDGE_FLAG_ALL,
- get_elt(elts, i + 0 + (i&1) + elt_bias),
- get_elt(elts, i + 1 - (i&1) + elt_bias),
+ get_elt(elts, i + 0 + (i&1)) + elt_bias,
+ get_elt(elts, i + 1 - (i&1)) + elt_bias,
get_elt(elts, i + 2 ) + elt_bias);
}
}