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authorTopi Pohjolainen <topi.pohjolainen@intel.com>2016-04-08 10:22:37 +0300
committerTopi Pohjolainen <topi.pohjolainen@intel.com>2016-04-21 10:20:01 +0300
commit9e4d19372b1d7f6ab12ddab1929a53335d9cce06 (patch)
tree3ec4a047e5277b38ac64b8a4f2099386a737d0f4 /src
parent6b33d63d77ab7835b5883140e54316e86e73888d (diff)
i965/blorp: Add support for sampling 3D textures
This patch adds additional MOV instruction for all blorp programs that use SHADER_OPCODE_TXF. Alternative is to augment blorp program key to tell if z-coordinate is needed, add condition to the blorp blit compiler and to produce a variant with and without the MOV. This seems a little overkill. Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Diffstat (limited to 'src')
-rw-r--r--src/mesa/drivers/dri/i965/brw_blorp.h8
-rw-r--r--src/mesa/drivers/dri/i965/brw_blorp_blit.cpp18
-rw-r--r--src/mesa/drivers/dri/i965/gen8_blorp.cpp3
3 files changed, 23 insertions, 6 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_blorp.h b/src/mesa/drivers/dri/i965/brw_blorp.h
index 7ebcee27455..a1aaa2096f2 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp.h
+++ b/src/mesa/drivers/dri/i965/brw_blorp.h
@@ -196,8 +196,14 @@ struct brw_blorp_wm_push_constants
float rect_grid_y1;
brw_blorp_coord_transform_params x_transform;
brw_blorp_coord_transform_params y_transform;
+
+ /* Minimum layer setting works for all the textures types but texture_3d
+ * for which the setting has no effect. Use the z-coordinate instead.
+ */
+ uint32_t src_z;
+
/* Pad out to an integral number of registers */
- uint32_t pad[6];
+ uint32_t pad[5];
};
/* Every 32 bytes of push constant data constitutes one GEN register. */
diff --git a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp b/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp
index 369e0f56a59..00087238ab4 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp
+++ b/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp
@@ -386,6 +386,7 @@ enum sampler_message_arg
SAMPLER_MESSAGE_ARG_V_FLOAT,
SAMPLER_MESSAGE_ARG_U_INT,
SAMPLER_MESSAGE_ARG_V_INT,
+ SAMPLER_MESSAGE_ARG_R_INT,
SAMPLER_MESSAGE_ARG_SI_INT,
SAMPLER_MESSAGE_ARG_MCS_INT,
SAMPLER_MESSAGE_ARG_ZERO_INT,
@@ -587,6 +588,7 @@ private:
struct brw_reg multiplier;
struct brw_reg offset;
} x_transform, y_transform;
+ struct brw_reg src_z;
/* Data read from texture (4 vec16's per array element) */
struct brw_reg texture_data[LOG2_MAX_BLEND_SAMPLES + 1];
@@ -828,6 +830,7 @@ brw_blorp_blit_program::alloc_push_const_regs(int base_reg)
ALLOC_REG(x_transform.offset, BRW_REGISTER_TYPE_F);
ALLOC_REG(y_transform.multiplier, BRW_REGISTER_TYPE_F);
ALLOC_REG(y_transform.offset, BRW_REGISTER_TYPE_F);
+ ALLOC_REG(src_z, BRW_REGISTER_TYPE_UD);
#undef CONST_LOC
#undef ALLOC_REG
}
@@ -1623,10 +1626,11 @@ brw_blorp_blit_program::texel_fetch(struct brw_reg dst)
SAMPLER_MESSAGE_ARG_ZERO_INT, /* LOD */
SAMPLER_MESSAGE_ARG_SI_INT
};
- static const sampler_message_arg gen7_ld_args[3] = {
+ static const sampler_message_arg gen7_ld_args[] = {
SAMPLER_MESSAGE_ARG_U_INT,
SAMPLER_MESSAGE_ARG_ZERO_INT, /* LOD */
- SAMPLER_MESSAGE_ARG_V_INT
+ SAMPLER_MESSAGE_ARG_V_INT,
+ SAMPLER_MESSAGE_ARG_R_INT
};
static const sampler_message_arg gen7_ld2dss_args[3] = {
SAMPLER_MESSAGE_ARG_SI_INT,
@@ -1639,10 +1643,11 @@ brw_blorp_blit_program::texel_fetch(struct brw_reg dst)
SAMPLER_MESSAGE_ARG_U_INT,
SAMPLER_MESSAGE_ARG_V_INT
};
- static const sampler_message_arg gen9_ld_args[3] = {
+ static const sampler_message_arg gen9_ld_args[] = {
SAMPLER_MESSAGE_ARG_U_INT,
SAMPLER_MESSAGE_ARG_V_INT,
- SAMPLER_MESSAGE_ARG_ZERO_INT /* LOD */
+ SAMPLER_MESSAGE_ARG_ZERO_INT, /* LOD */
+ SAMPLER_MESSAGE_ARG_R_INT
};
switch (brw->gen) {
@@ -1730,6 +1735,9 @@ brw_blorp_blit_program::texture_lookup(struct brw_reg dst,
case SAMPLER_MESSAGE_ARG_V_INT:
emit_mov(mrf, Y);
break;
+ case SAMPLER_MESSAGE_ARG_R_INT:
+ emit_mov(mrf, src_z);
+ break;
case SAMPLER_MESSAGE_ARG_SI_INT:
/* Note: on Gen7, this code may be reached with s_is_zero==true
* because in Gen7's ld2dss message, the sample index is the first
@@ -2050,6 +2058,8 @@ brw_blorp_blit_params::brw_blorp_blit_params(struct brw_context *brw,
wm_push_consts.x_transform.setup(src_x0, src_x1, dst_x0, dst_x1, mirror_x);
wm_push_consts.y_transform.setup(src_y0, src_y1, dst_y0, dst_y1, mirror_y);
+ wm_push_consts.src_z = src.mt->target == GL_TEXTURE_3D ? src.layer : 0;
+
if (dst.num_samples <= 1 && dst_mt->num_samples > 1) {
/* We must expand the rectangle we send through the rendering pipeline,
* to account for the fact that we are mapping the destination region as
diff --git a/src/mesa/drivers/dri/i965/gen8_blorp.cpp b/src/mesa/drivers/dri/i965/gen8_blorp.cpp
index 1d3a62b5a4d..d362dbe9053 100644
--- a/src/mesa/drivers/dri/i965/gen8_blorp.cpp
+++ b/src/mesa/drivers/dri/i965/gen8_blorp.cpp
@@ -591,8 +591,9 @@ gen8_blorp_emit_surface_states(struct brw_context *brw,
mt->target == GL_TEXTURE_CUBE_MAP;
const unsigned depth = (is_cube ? 6 : 1) * mt->logical_depth0;
const GLenum target = is_cube ? GL_TEXTURE_2D_ARRAY : mt->target;
- const unsigned layer = surface->layer / MAX2(mt->num_samples, 1);
const unsigned max_level = surface->level + mt->last_level + 1;
+ const unsigned layer = mt->target != GL_TEXTURE_3D ?
+ surface->layer / MAX2(mt->num_samples, 1) : 0;
brw->vtbl.emit_texture_surface_state(brw, mt, target,
layer, layer + depth,