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authorChad Versace <chad.versace@intel.com>2015-10-01 08:06:35 -0700
committerChad Versace <chad.versace@intel.com>2015-10-05 11:14:04 -0700
commit93161be9e7150ae5931000627833e714901cf195 (patch)
tree7f067a062a45478a72e96b6eec1160849716c33e /src
parent125a04b474d4a07fec892e00fd56340e7d4ab03b (diff)
i965: Fix intel_miptree_is_fast_clear_capable()skl-fast-clear-v08.00
There are three types of fast clears: a. fast depth clears b. fast singlesample color clears c. fast multisample color clears Function intel_miptree_is_fast_clear_capable() checks if a miptree supports fast clears of type (b). Rename the function to disambiguate what it does: old: intel_miptree_is_fast_clear_capable new: intel_miptree_supports_non_msrt_fast_clear The functionally accidentally rejected multisampled color surfaces because it thought they were singlesample array surfaces. Fix that by explicitly rejecting surfaces with samples > 1. This fix would have been needed before we enabled layered fast singlesample color clears (introduced in gen8), which we want to do eventually. For now, though, this patch changes no behavior; it just fixes how the driver chooses its behavior. Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Diffstat (limited to 'src')
-rw-r--r--src/mesa/drivers/dri/i965/intel_mipmap_tree.c24
1 files changed, 19 insertions, 5 deletions
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
index 05dc291d847..a169c41790e 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
@@ -194,8 +194,8 @@ intel_tiling_supports_non_msrt_mcs(struct brw_context *brw, unsigned tiling)
* 64bpp, and 128bpp.
*/
static bool
-intel_miptree_is_fast_clear_capable(struct brw_context *brw,
- struct intel_mipmap_tree *mt)
+intel_miptree_supports_non_msrt_fast_clear(struct brw_context *brw,
+ struct intel_mipmap_tree *mt)
{
/* MCS support does not exist prior to Gen7 */
if (brw->gen < 7)
@@ -204,6 +204,10 @@ intel_miptree_is_fast_clear_capable(struct brw_context *brw,
if (mt->disable_aux_buffers)
return false;
+ /* This function applies only to non-multisampled render targets. */
+ if (mt->num_samples > 1)
+ return false;
+
/* MCS is only supported for color buffers */
switch (_mesa_get_format_base_format(mt->format)) {
case GL_DEPTH_COMPONENT:
@@ -222,7 +226,16 @@ intel_miptree_is_fast_clear_capable(struct brw_context *brw,
return false;
}
+
+ /* Check for layered surfaces. */
if (mt->physical_depth0 != 1) {
+ /* Multisample surfaces with the CMS layout are not layered surfaces,
+ * yet still have physical_depth0 > 1. Assert that we don't
+ * accidentally reject a multisampled surface here. We should have
+ * rejected it earlier by explicitly checking the sample count.
+ */
+ assert(mt->num_samples <= 1);
+
if (brw->gen >= 8) {
perf_debug("Layered fast clear - giving up. (%dx%d%d)\n",
mt->logical_width0, mt->logical_height0,
@@ -494,7 +507,7 @@ intel_miptree_create_layout(struct brw_context *brw,
* 7 | ? | ?
* 6 | ? | ?
*/
- if (intel_miptree_is_fast_clear_capable(brw, mt)) {
+ if (intel_miptree_supports_non_msrt_fast_clear(brw, mt)) {
if (brw->gen >= 9 || (brw->gen == 8 && num_samples <= 1))
layout_flags |= MIPTREE_LAYOUT_FORCE_HALIGN16;
} else if (brw->gen >= 9 && num_samples > 1) {
@@ -692,7 +705,7 @@ intel_miptree_create(struct brw_context *brw,
* clear actually occurs.
*/
if (intel_tiling_supports_non_msrt_mcs(brw, mt->tiling) &&
- intel_miptree_is_fast_clear_capable(brw, mt)) {
+ intel_miptree_supports_non_msrt_fast_clear(brw, mt)) {
mt->fast_clear_state = INTEL_FAST_CLEAR_STATE_RESOLVED;
assert(brw->gen < 8 || mt->halign == 16 || num_samples <= 1);
}
@@ -800,8 +813,9 @@ intel_update_winsys_renderbuffer_miptree(struct brw_context *intel,
* clear actually occurs.
*/
if (intel_tiling_supports_non_msrt_mcs(intel, singlesample_mt->tiling) &&
- intel_miptree_is_fast_clear_capable(intel, singlesample_mt))
+ intel_miptree_supports_non_msrt_fast_clear(intel, singlesample_mt)) {
singlesample_mt->fast_clear_state = INTEL_FAST_CLEAR_STATE_RESOLVED;
+ }
if (num_samples == 0) {
intel_miptree_release(&irb->mt);