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authorTopi Pohjolainen <topi.pohjolainen@intel.com>2016-04-15 10:43:05 +0300
committerTopi Pohjolainen <topi.pohjolainen@intel.com>2016-04-21 10:20:03 +0300
commit7644e8ab6814554420b01a900643ba72bb09b2c9 (patch)
tree8d9ccf5c5edfdea1e7f2c46ed69ff785fd821b0d /src
parentaa322f8ae5be1bbb32ecdacb0984d79c242f4a95 (diff)
i965/blorp: Prepare to switch from compute pipeline
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Diffstat (limited to 'src')
-rw-r--r--src/mesa/drivers/dri/i965/brw_blorp.cpp2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_blorp.cpp b/src/mesa/drivers/dri/i965/brw_blorp.cpp
index 618949c72a8..5f0083c1029 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp.cpp
+++ b/src/mesa/drivers/dri/i965/brw_blorp.cpp
@@ -227,6 +227,8 @@ brw_blorp_exec(struct brw_context *brw, const brw_blorp_params *params)
*/
brw_emit_mi_flush(brw);
+ brw_select_pipeline(brw, BRW_RENDER_PIPELINE);
+
retry:
intel_batchbuffer_require_space(brw, estimated_max_batch_usage, RENDER_RING);
intel_batchbuffer_save_state(brw);