i965: Emit compaction stats without walking the assembly.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

3 files changed, 12 insertions, 19 deletions

diff --git a/src/mesa/drivers/dri/i965/brw_eu_compact.c b/src/mesa/drivers/dri/i965/brw_eu_compact.c
index f40ba047697..05603670a05 100644
--- a/src/mesa/drivers/dri/i965/brw_eu_compact.c
+++ b/src/mesa/drivers/dri/i965/brw_eu_compact.c
@@ -841,23 +841,4 @@ brw_compact_instructions(struct brw_compile *p, int start_offset,
 
       annotation[num_annotations].offset = p->next_insn_offset;
    }
-
-   if (0) {
-      fprintf(stderr, "dumping compacted program\n");
-      brw_disassemble(brw, store, 0, p->next_insn_offset - start_offset, stderr);
-
-      int cmp = 0;
-      for (offset = 0; offset < p->next_insn_offset - start_offset;) {
-         struct brw_instruction *insn = store + offset;
-
-         if (insn->header.cmpt_control) {
-            offset += 8;
-            cmp++;
-         } else {
-            offset += 16;
-         }
-      }
-      fprintf(stderr, "%db/%db saved (%d%%)\n", cmp * 8, offset + cmp * 8,
-              cmp * 8 * 100 / (offset + cmp * 8));
-   }
 }
diff --git a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
index 2602b5669ec..3ff7682d91b 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
@@ -1769,8 +1769,10 @@ fs_generator::generate_code(exec_list *instructions)
    brw_set_uip_jip(p);
    annotation_finalize(&annotation, p->next_insn_offset);
 
+   int before_size = p->next_insn_offset - start_offset;
    brw_compact_instructions(p, start_offset, annotation.ann_count,
                             annotation.ann);
+   int after_size = p->next_insn_offset - start_offset;
 
    if (unlikely(debug_flag)) {
       if (prog) {
@@ -1786,6 +1788,10 @@ fs_generator::generate_code(exec_list *instructions)
          fprintf(stderr, "Native code for blorp program (SIMD%d dispatch):\n",
                  dispatch_width);
       }
+      fprintf(stderr, "SIMD%d shader: %d instructions. Compacted %d to %d"
+                      " bytes (%.0f%%)\n",
+              dispatch_width, before_size / 16, before_size, after_size,
+              100.0f * (before_size - after_size) / before_size);
 
       const struct gl_program *prog = fp ? &fp->Base : NULL;
 
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
index 9ee688cab19..e95e6d9ba44 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
@@ -1311,7 +1311,9 @@ vec4_generator::generate_code(exec_list *instructions)
    brw_set_uip_jip(p);
    annotation_finalize(&annotation, p->next_insn_offset);
 
+   int before_size = p->next_insn_offset;
    brw_compact_instructions(p, 0, annotation.ann_count, annotation.ann);
+   int after_size = p->next_insn_offset;
 
    if (unlikely(debug_flag)) {
       if (shader_prog) {
@@ -1321,6 +1323,10 @@ vec4_generator::generate_code(exec_list *instructions)
       } else {
          fprintf(stderr, "Native code for vertex program %d:\n", prog->Id);
       }
+      fprintf(stderr, "vec4 shader: %d instructions. Compacted %d to %d"
+                      " bytes (%.0f%%)\n",
+              before_size / 16, before_size, after_size,
+              100.0f * (before_size - after_size) / before_size);
 
       dump_assembly(p->store, annotation.ann_count, annotation.ann,
                     brw, prog, brw_disassemble);