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| author | Timothy Arceri <tarceri@itsqueeze.com> | 2020-04-07 11:28:32 +1000 |
|---|---|---|
| committer | Marge Bot <eric+marge@anholt.net> | 2020-04-08 01:23:40 +0000 |
| commit | 1f649ff10764b2f47fd69013f390e9286547cc3b (patch) | |
| tree | 49458427d8cd4f5e7c6d6a9554276c3d38267a5c /src | |
| parent | c682ea598f72ded39903015ec3188969fe468ff7 (diff) | |
radeonsi: don't lower constant arrays to uniforms in GLSL IR
This re-enables the change made in 2f5783bc2b82 which was
incorrectly disabled by 3e1dd99adca5.
For radeonsi, we will prefer the NIR pass as it'll generate better code
(some index calculation and a single load vs. a load, then index
calculation, then another load) and oftentimes NIR optimization can kick
in and make all the access indices constant.
Fixes: 3e1dd99adca5 ("radeonsi: Remove a bunch of default handling of pipe caps.")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4474>
Diffstat (limited to 'src')
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_get.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/gallium/drivers/radeonsi/si_get.c b/src/gallium/drivers/radeonsi/si_get.c index 2a4a23cec13..4089b944559 100644 --- a/src/gallium/drivers/radeonsi/si_get.c +++ b/src/gallium/drivers/radeonsi/si_get.c @@ -218,6 +218,7 @@ static int si_get_param(struct pipe_screen *pscreen, enum pipe_cap param) return sscreen->info.has_sparse_vm_mappings ? RADEON_SPARSE_PAGE_SIZE : 0; case PIPE_CAP_UMA: + case PIPE_CAP_PREFER_IMM_ARRAYS_AS_CONSTBUF: return 0; case PIPE_CAP_FENCE_SIGNAL: |