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authorLionel Landwerlin <lionel.g.landwerlin@intel.com>2017-06-22 02:15:50 +0100
committerLionel Landwerlin <lionel.g.landwerlin@intel.com>2017-06-27 14:10:25 +0300
commitadafe4b733c0242720ccfe10d391e5d44c0e7401 (patch)
treeef9d9da01ffbc58a637842c73fdea58290c7dd16 /src/mesa
parent7ee409dd4ee57c53d0ca4ddfcd853460db0b2ac4 (diff)
i965: perf: minimize the chances to spread queries across batchbuffers
Counter related to timings will be sensitive to any delay introduced by the software. In particular if our begin & end of performance queries end up in different batches, time related counters will exhibit biffer values caused by the time it takes for the kernel driver to load new requests into the hardware. Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Diffstat (limited to 'src/mesa')
-rw-r--r--src/mesa/drivers/dri/i965/brw_performance_query.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_performance_query.c b/src/mesa/drivers/dri/i965/brw_performance_query.c
index 06576a54d03..6b874d0bbee 100644
--- a/src/mesa/drivers/dri/i965/brw_performance_query.c
+++ b/src/mesa/drivers/dri/i965/brw_performance_query.c
@@ -1063,6 +1063,14 @@ brw_end_perf_query(struct gl_context *ctx,
obj->oa.begin_report_id + 1);
}
+ /* We flush the batchbuffer here to minimize the chances that MI_RPC
+ * delimiting commands end up in different batchbuffers. If that's the
+ * case, the measurement will include the time it takes for the kernel
+ * scheduler to load a new request into the hardware. This is manifested
+ * in tools like frameretrace by spikes in the "GPU Core Clocks"
+ * counter.
+ */
+ intel_batchbuffer_flush(brw);
--brw->perfquery.n_active_oa_queries;
/* NB: even though the query has now ended, it can't be accumulated