diff options
author | Eric Anholt <eric@anholt.net> | 2020-09-16 12:44:14 -0700 |
---|---|---|
committer | Marge Bot <eric+marge@anholt.net> | 2020-09-25 19:36:23 +0000 |
commit | b4a087ce1b939257a652f545a66d9a85c1fd8dc8 (patch) | |
tree | 5ebd30824ece9ba9d5f5acbd2943f61a83a6e26d /src/mesa/drivers/dri | |
parent | e5d2481bfe761816bae173856262b0232a92b07b (diff) |
driconf: Use nesting macros for defining options.
Manually balancing the BEGIN/ENDs is a recipe for xml validation failures,
just make the macros do the balancing. The only ugly bit I think is that
enums take a list of DRI_CONF_ENUM() without ','s in between them.
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6753>
Diffstat (limited to 'src/mesa/drivers/dri')
-rw-r--r-- | src/mesa/drivers/dri/i915/intel_screen.c | 23 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/intel_screen.c | 14 | ||||
-rw-r--r-- | src/mesa/drivers/dri/radeon/radeon_screen.c | 32 | ||||
-rw-r--r-- | src/mesa/drivers/dri/radeon/radeon_screen.h | 58 |
4 files changed, 49 insertions, 78 deletions
diff --git a/src/mesa/drivers/dri/i915/intel_screen.c b/src/mesa/drivers/dri/i915/intel_screen.c index cf134339564..9eac6ada2d6 100644 --- a/src/mesa/drivers/dri/i915/intel_screen.c +++ b/src/mesa/drivers/dri/i915/intel_screen.c @@ -52,16 +52,13 @@ DRI_CONF_BEGIN /* Options correspond to DRI_CONF_BO_REUSE_DISABLED, * DRI_CONF_BO_REUSE_ALL */ - DRI_CONF_OPT_BEGIN_V(bo_reuse, enum, 1, "0:1") - DRI_CONF_DESC_BEGIN("Buffer object reuse") - DRI_CONF_ENUM(0, "Disable buffer object reuse") - DRI_CONF_ENUM(1, "Enable reuse of all sizes of buffer objects") - DRI_CONF_DESC_END - DRI_CONF_OPT_END + DRI_CONF_OPT_E(bo_reuse, 1, 0, 1, + "Buffer object reuse", + DRI_CONF_ENUM(0, "Disable buffer object reuse") + DRI_CONF_ENUM(1, "Enable reuse of all sizes of buffer objects")) - DRI_CONF_OPT_BEGIN_B(fragment_shader, "true") - DRI_CONF_DESC("Enable limited ARB_fragment_shader support on 915/945.") - DRI_CONF_OPT_END + DRI_CONF_OPT_B(fragment_shader, "true", + "Enable limited ARB_fragment_shader support on 915/945.") DRI_CONF_SECTION_END DRI_CONF_SECTION_QUALITY @@ -74,13 +71,9 @@ DRI_CONF_BEGIN DRI_CONF_DISABLE_GLSL_LINE_CONTINUATIONS("false") DRI_CONF_DISABLE_BLEND_FUNC_EXTENDED("false") - DRI_CONF_OPT_BEGIN_B(stub_occlusion_query, "false") - DRI_CONF_DESC("Enable stub ARB_occlusion_query support on 915/945.") - DRI_CONF_OPT_END + DRI_CONF_OPT_B(stub_occlusion_query, "false", "Enable stub ARB_occlusion_query support on 915/945.") - DRI_CONF_OPT_BEGIN_B(shader_precompile, "true") - DRI_CONF_DESC("Perform code generation at shader link time.") - DRI_CONF_OPT_END + DRI_CONF_OPT_B(shader_precompile, "true", "Perform code generation at shader link time.") DRI_CONF_SECTION_END DRI_CONF_END }; diff --git a/src/mesa/drivers/dri/i965/intel_screen.c b/src/mesa/drivers/dri/i965/intel_screen.c index 77577ec0f42..c585fa0e871 100644 --- a/src/mesa/drivers/dri/i965/intel_screen.c +++ b/src/mesa/drivers/dri/i965/intel_screen.c @@ -57,12 +57,10 @@ DRI_CONF_BEGIN /* Options correspond to DRI_CONF_BO_REUSE_DISABLED, * DRI_CONF_BO_REUSE_ALL */ - DRI_CONF_OPT_BEGIN_V(bo_reuse, enum, 1, "0:1") - DRI_CONF_DESC_BEGIN("Buffer object reuse") - DRI_CONF_ENUM(0, "Disable buffer object reuse") - DRI_CONF_ENUM(1, "Enable reuse of all sizes of buffer objects") - DRI_CONF_DESC_END - DRI_CONF_OPT_END + DRI_CONF_OPT_E(bo_reuse, 1, 0, 1, + "Buffer object reuse", + DRI_CONF_ENUM(0, "Disable buffer object reuse") + DRI_CONF_ENUM(1, "Enable reuse of all sizes of buffer objects")) DRI_CONF_MESA_NO_ERROR("false") DRI_CONF_MESA_GLTHREAD("false") DRI_CONF_SECTION_END @@ -93,9 +91,7 @@ DRI_CONF_BEGIN DRI_CONF_FORCE_GLSL_ABS_SQRT("false") DRI_CONF_FORCE_GL_VENDOR() - DRI_CONF_OPT_BEGIN_B(shader_precompile, "true") - DRI_CONF_DESC("Perform code generation at shader link time.") - DRI_CONF_OPT_END + DRI_CONF_OPT_B(shader_precompile, "true", "Perform code generation at shader link time.") DRI_CONF_SECTION_END DRI_CONF_SECTION_MISCELLANEOUS diff --git a/src/mesa/drivers/dri/radeon/radeon_screen.c b/src/mesa/drivers/dri/radeon/radeon_screen.c index c56eba0b935..7ed656055bd 100644 --- a/src/mesa/drivers/dri/radeon/radeon_screen.c +++ b/src/mesa/drivers/dri/radeon/radeon_screen.c @@ -65,34 +65,26 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #include "util/driconf.h" #define DRI_CONF_COMMAND_BUFFER_SIZE(def,min,max) \ -DRI_CONF_OPT_BEGIN_V(command_buffer_size,int,def, # min ":" # max ) \ - DRI_CONF_DESC("Size of command buffer (in KB)") \ -DRI_CONF_OPT_END + DRI_CONF_OPT_I(command_buffer_size, def, min, max, \ + "Size of command buffer (in KB)") #define DRI_CONF_MAX_TEXTURE_UNITS(def,min,max) \ -DRI_CONF_OPT_BEGIN_V(texture_units,int,def, # min ":" # max ) \ - DRI_CONF_DESC("Number of texture units used") \ -DRI_CONF_OPT_END + DRI_CONF_OPT_I(texture_units,def, min, max, \ + "Number of texture units used") #define DRI_CONF_HYPERZ(def) \ -DRI_CONF_OPT_BEGIN_B(hyperz, def) \ - DRI_CONF_DESC("Use HyperZ to boost performance") \ -DRI_CONF_OPT_END + DRI_CONF_OPT_B(hyperz, def, "Use HyperZ to boost performance") #define DRI_CONF_TCL_MODE(def) \ -DRI_CONF_OPT_BEGIN_V(tcl_mode,enum,def,"0:3") \ - DRI_CONF_DESC_BEGIN("TCL mode (Transformation, Clipping, Lighting)") \ - DRI_CONF_ENUM(0,"Use software TCL pipeline") \ - DRI_CONF_ENUM(1,"Use hardware TCL as first TCL pipeline stage") \ - DRI_CONF_ENUM(2,"Bypass the TCL pipeline") \ - DRI_CONF_ENUM(3,"Bypass the TCL pipeline with state-based machine code generated on-the-fly") \ - DRI_CONF_DESC_END \ -DRI_CONF_OPT_END + DRI_CONF_OPT_E(tcl_mode, def, 0, 3, \ + "TCL mode (Transformation, Clipping, Lighting)", \ + DRI_CONF_ENUM(0,"Use software TCL pipeline") \ + DRI_CONF_ENUM(1,"Use hardware TCL as first TCL pipeline stage") \ + DRI_CONF_ENUM(2,"Bypass the TCL pipeline") \ + DRI_CONF_ENUM(3,"Bypass the TCL pipeline with state-based machine code generated on-the-fly")) #define DRI_CONF_NO_NEG_LOD_BIAS(def) \ -DRI_CONF_OPT_BEGIN_B(no_neg_lod_bias, def) \ - DRI_CONF_DESC("Forbid negative texture LOD bias") \ -DRI_CONF_OPT_END + DRI_CONF_OPT_B(no_neg_lod_bias, def, "Forbid negative texture LOD bias") #define DRI_CONF_DEF_MAX_ANISOTROPY(def,range) \ DRI_CONF_OPT_BEGIN_V(def_max_anisotropy,float,def,range) \ diff --git a/src/mesa/drivers/dri/radeon/radeon_screen.h b/src/mesa/drivers/dri/radeon/radeon_screen.h index 6a49cec0e39..4aee0c49b6f 100644 --- a/src/mesa/drivers/dri/radeon/radeon_screen.h +++ b/src/mesa/drivers/dri/radeon/radeon_screen.h @@ -50,60 +50,50 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define DRI_CONF_COLOR_REDUCTION_ROUND 0 #define DRI_CONF_COLOR_REDUCTION_DITHER 1 #define DRI_CONF_COLOR_REDUCTION(def) \ -DRI_CONF_OPT_BEGIN_V(color_reduction,enum,def,"0:1") \ - DRI_CONF_DESC_BEGIN("Initial color reduction method") \ - DRI_CONF_ENUM(0,"Round colors") \ - DRI_CONF_ENUM(1,"Dither colors") \ - DRI_CONF_DESC_END \ -DRI_CONF_OPT_END + DRI_CONF_OPT_E(color_reduction, def, 0, 1, \ + "Initial color reduction method", \ + DRI_CONF_ENUM(0, "Round colors") \ + DRI_CONF_ENUM(1, "Dither colors")) #define DRI_CONF_DITHER_XERRORDIFF 0 #define DRI_CONF_DITHER_XERRORDIFFRESET 1 #define DRI_CONF_DITHER_ORDERED 2 #define DRI_CONF_DITHER_MODE(def) \ -DRI_CONF_OPT_BEGIN_V(dither_mode,enum,def,"0:2") \ - DRI_CONF_DESC_BEGIN("Color dithering method") \ - DRI_CONF_ENUM(0,"Horizontal error diffusion") \ - DRI_CONF_ENUM(1,"Horizontal error diffusion, reset error at line start") \ - DRI_CONF_ENUM(2,"Ordered 2D color dithering") \ - DRI_CONF_DESC_END \ -DRI_CONF_OPT_END + DRI_CONF_OPT_E(dither_mode, def, 0, 2, \ + "Color dithering method", \ + DRI_CONF_ENUM(0, "Horizontal error diffusion") \ + DRI_CONF_ENUM(1, "Horizontal error diffusion, reset error at line start") \ + DRI_CONF_ENUM(2, "Ordered 2D color dithering")) #define DRI_CONF_ROUND_TRUNC 0 #define DRI_CONF_ROUND_ROUND 1 #define DRI_CONF_ROUND_MODE(def) \ -DRI_CONF_OPT_BEGIN_V(round_mode,enum,def,"0:1") \ - DRI_CONF_DESC_BEGIN("Color rounding method") \ - DRI_CONF_ENUM(0,"Round color components downward") \ - DRI_CONF_ENUM(1,"Round to nearest color") \ - DRI_CONF_DESC_END \ -DRI_CONF_OPT_END + DRI_CONF_OPT_E(round_mode, def, 0, 1, \ + "Color rounding method", \ + DRI_CONF_ENUM(0, "Round color components downward") \ + DRI_CONF_ENUM(1, "Round to nearest color")) #define DRI_CONF_FTHROTTLE_BUSY 0 #define DRI_CONF_FTHROTTLE_USLEEPS 1 #define DRI_CONF_FTHROTTLE_IRQS 2 #define DRI_CONF_FTHROTTLE_MODE(def) \ -DRI_CONF_OPT_BEGIN_V(fthrottle_mode,enum,def,"0:2") \ - DRI_CONF_DESC_BEGIN("Method to limit rendering latency") \ - DRI_CONF_ENUM(0,"Busy waiting for the graphics hardware") \ - DRI_CONF_ENUM(1,"Sleep for brief intervals while waiting for the graphics hardware") \ - DRI_CONF_ENUM(2,"Let the graphics hardware emit a software interrupt and sleep") \ - DRI_CONF_DESC_END \ -DRI_CONF_OPT_END + DRI_CONF_OPT_E(fthrottle_mode, def, 0, 2, \ + "Method to limit rendering latency", \ + DRI_CONF_ENUM(0, "Busy waiting for the graphics hardware") \ + DRI_CONF_ENUM(1, "Sleep for brief intervals while waiting for the graphics hardware") \ + DRI_CONF_ENUM(2, "Let the graphics hardware emit a software interrupt and sleep")) #define DRI_CONF_TEXTURE_DEPTH_FB 0 #define DRI_CONF_TEXTURE_DEPTH_32 1 #define DRI_CONF_TEXTURE_DEPTH_16 2 #define DRI_CONF_TEXTURE_DEPTH_FORCE_16 3 #define DRI_CONF_TEXTURE_DEPTH(def) \ -DRI_CONF_OPT_BEGIN_V(texture_depth,enum,def,"0:3") \ - DRI_CONF_DESC_BEGIN("Texture color depth") \ - DRI_CONF_ENUM(0,"Prefer frame buffer color depth") \ - DRI_CONF_ENUM(1,"Prefer 32 bits per texel") \ - DRI_CONF_ENUM(2,"Prefer 16 bits per texel") \ - DRI_CONF_ENUM(3,"Force 16 bits per texel") \ - DRI_CONF_DESC_END \ -DRI_CONF_OPT_END + DRI_CONF_OPT_E(texture_depth, def, 0, 3, \ + "Texture color depth", \ + DRI_CONF_ENUM(0, "Prefer frame buffer color depth") \ + DRI_CONF_ENUM(1, "Prefer 32 bits per texel") \ + DRI_CONF_ENUM(2, "Prefer 16 bits per texel") \ + DRI_CONF_ENUM(3, "Force 16 bits per texel")) #define DRI_CONF_TCL_SW 0 #define DRI_CONF_TCL_PIPELINED 1 |