diff options
| author | Chris Forbes <chrisf@ijw.co.nz> | 2013-07-30 06:12:24 +1200 |
|---|---|---|
| committer | Ian Romanick <ian.d.romanick@intel.com> | 2013-08-05 16:57:57 -0700 |
| commit | 3bdd95270dd252f48e2b062c7ee000a344cc3585 (patch) | |
| tree | 8914c1070f7dac09ffceaf2cc87aa415d188d435 /src/mesa/drivers/dri | |
| parent | 5476049e3829b495daabb0aa4c4495dbb03edf87 (diff) | |
i965/vs: set up sampler state pointer for Gen4/5.
Fixes broken filter and lod selection for vertex texturing.
(txs/txf only worked properly because they ignore the sampler state
completely)
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 97676032c28e20b4c4150c3632794f5bdaa9efad)
Diffstat (limited to 'src/mesa/drivers/dri')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_vs_state.c | 27 |
1 files changed, 21 insertions, 6 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_vs_state.c b/src/mesa/drivers/dri/i965/brw_vs_state.c index 4dda5224042..ddaf914f103 100644 --- a/src/mesa/drivers/dri/i965/brw_vs_state.c +++ b/src/mesa/drivers/dri/i965/brw_vs_state.c @@ -138,11 +138,13 @@ brw_upload_vs_unit(struct brw_context *brw) vs->thread4.max_threads = CLAMP(brw->urb.nr_vs_entries / 2, 1, brw->max_vs_threads) - 1; - /* No samplers for ARB_vp programs: - */ - /* It has to be set to 0 for Ironlake - */ - vs->vs5.sampler_count = 0; + if (brw->gen == 5) + vs->vs5.sampler_count = 0; /* hardware requirement */ + else { + /* CACHE_NEW_SAMPLER */ + vs->vs5.sampler_count = (brw->sampler.count + 3) / 4; + } + if (unlikely(INTEL_DEBUG & DEBUG_STATS)) vs->thread4.stats_enable = 1; @@ -151,6 +153,19 @@ brw_upload_vs_unit(struct brw_context *brw) */ vs->vs6.vs_enable = 1; + /* Set the sampler state pointer, and its reloc + */ + if (brw->sampler.count) { + vs->vs5.sampler_state_pointer = + (brw->batch.bo->offset + brw->sampler.offset) >> 5; + drm_intel_bo_emit_reloc(brw->batch.bo, + brw->vs.state_offset + + offsetof(struct brw_vs_unit_state, vs5), + brw->batch.bo, + brw->sampler.offset | vs->vs5.sampler_count, + I915_GEM_DOMAIN_INSTRUCTION, 0); + } + /* Emit scratch space relocation */ if (brw->vs.prog_data->base.total_scratch != 0) { drm_intel_bo_emit_reloc(brw->batch.bo, @@ -172,7 +187,7 @@ const struct brw_tracked_state brw_vs_unit = { BRW_NEW_CURBE_OFFSETS | BRW_NEW_URB_FENCE | BRW_NEW_VERTEX_PROGRAM), - .cache = CACHE_NEW_VS_PROG + .cache = CACHE_NEW_VS_PROG | CACHE_NEW_SAMPLER }, .emit = brw_upload_vs_unit, }; |