diff options
author | Jason Ekstrand <jason.ekstrand@intel.com> | 2018-09-07 00:40:54 -0500 |
---|---|---|
committer | Jason Ekstrand <jason.ekstrand@intel.com> | 2018-09-07 10:42:40 -0500 |
commit | f9e630e23dfa3de815026a08e7e767e2ed90da0b (patch) | |
tree | d8b98798a59c5b89ab178d013ac1c8a863befeae /src/mesa/drivers/dri/i965/intel_mipmap_tree.c | |
parent | a91b158bd9e1b6bc08f1d5ac350cd8b68e372042 (diff) |
i965: Workaround the gen9 hw astc5x5 sampler bug
gen9 hardware has a bug in the sampler cache that can cause GPU hangs
whenever an texture with aux compression enabled is in the sampler cache
together with an ASTC5x5 texture. Because we can't control what the
client binds at any given time, we have two options: resolve the CCS or
decompresss the ASTC. Doing a CCS or HiZ resolve is far less drastic
and will likely have a smaller performance impact.
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Tested-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Diffstat (limited to 'src/mesa/drivers/dri/i965/intel_mipmap_tree.c')
-rw-r--r-- | src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 19 |
1 files changed, 16 insertions, 3 deletions
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c index 983f145afc9..36681352ba7 100644 --- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c +++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c @@ -2542,8 +2542,19 @@ can_texture_with_ccs(struct brw_context *brw, enum isl_aux_usage intel_miptree_texture_aux_usage(struct brw_context *brw, struct intel_mipmap_tree *mt, - enum isl_format view_format) + enum isl_format view_format, + enum gen9_astc5x5_wa_tex_type astc5x5_wa_bits) { + assert(brw->screen->devinfo.gen == 9 || astc5x5_wa_bits == 0); + + /* On gen9, ASTC 5x5 textures cannot live in the sampler cache along side + * CCS or HiZ compressed textures. See gen9_apply_astc5x5_wa_flush() for + * details. + */ + if ((astc5x5_wa_bits & GEN9_ASTC5X5_WA_TEX_TYPE_ASTC5x5) && + mt->aux_usage != ISL_AUX_USAGE_MCS) + return ISL_AUX_USAGE_NONE; + switch (mt->aux_usage) { case ISL_AUX_USAGE_HIZ: if (intel_miptree_sample_with_hiz(brw, mt)) @@ -2601,10 +2612,12 @@ intel_miptree_prepare_texture(struct brw_context *brw, struct intel_mipmap_tree *mt, enum isl_format view_format, uint32_t start_level, uint32_t num_levels, - uint32_t start_layer, uint32_t num_layers) + uint32_t start_layer, uint32_t num_layers, + enum gen9_astc5x5_wa_tex_type astc5x5_wa_bits) { enum isl_aux_usage aux_usage = - intel_miptree_texture_aux_usage(brw, mt, view_format); + intel_miptree_texture_aux_usage(brw, mt, view_format, astc5x5_wa_bits); + bool clear_supported = aux_usage != ISL_AUX_USAGE_NONE; /* Clear color is specified as ints or floats and the conversion is done by |