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authorIan Romanick <ian.d.romanick@intel.com>2018-09-11 16:50:06 -0700
committerMarge Bot <eric+marge@anholt.net>2020-01-23 00:18:57 +0000
commit4e9079d0c71e42e152a00678bbe2665882849a43 (patch)
tree4e393189b98cd307bdb15bb9fb7242b5361692d5 /src/mesa/drivers/dri/i965/intel_extensions.c
parent4fcddb55f27e29d78c6937c20d91e7f9962ce875 (diff)
i965: Enable INTEL_shader_integer_functions2 on Gen8+
v2: Use new lower_hadd64 and lower_usub_sat64 flags. v3: Enable SPIR-V capability. v4: Move lowering options to COMMON_SCALAR_OPTIONS. Suggested by Caio. Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/767>
Diffstat (limited to 'src/mesa/drivers/dri/i965/intel_extensions.c')
-rw-r--r--src/mesa/drivers/dri/i965/intel_extensions.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/intel_extensions.c b/src/mesa/drivers/dri/i965/intel_extensions.c
index e7ea8cde52e..01dacbec8d7 100644
--- a/src/mesa/drivers/dri/i965/intel_extensions.c
+++ b/src/mesa/drivers/dri/i965/intel_extensions.c
@@ -320,6 +320,11 @@ intelInitExtensions(struct gl_context *ctx)
/* requires ARB_gpu_shader_int64 */
ctx->Extensions.ARB_shader_ballot = true;
ctx->Extensions.ARB_ES3_2_compatibility = true;
+
+ /* Currently only implemented in the scalar backend, so only enable for
+ * Gen8+. Eventually Gen6+ could be supported.
+ */
+ ctx->Extensions.INTEL_shader_integer_functions2 = true;
}
if (devinfo->gen >= 9) {