i965/CFL: Add PCI Ids for Coffee Lake.

Coffee Lake has a gen9 graphics following KBL.
From 3D perspective, CFL is a clone of KBL/SKL features.

v2: Change commit message, correct alignment <Anuj Phogat>
v3: Update IDs.
v4: Initialize l3_banks, correct nomenclature <Anuj>

Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Acked-by: Benjamin Widawsky <benjamin.widawsky@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>

2 files changed, 27 insertions, 0 deletions

diff --git a/src/intel/common/gen_device_info.c b/src/intel/common/gen_device_info.c
index 423748ea08c..f008b76ea47 100644
--- a/src/intel/common/gen_device_info.c
+++ b/src/intel/common/gen_device_info.c
@@ -607,6 +607,32 @@ static const struct gen_device_info gen_device_info_glk_2x6 = {
    .is_geminilake = true,
 };
 
+static const struct gen_device_info gen_device_info_cfl_gt1 = {
+   GEN9_FEATURES,
+   .is_coffeelake = true,
+   .gt = 1,
+
+   .num_slices = 1,
+   .l3_banks = 2,
+};
+static const struct gen_device_info gen_device_info_cfl_gt2 = {
+   GEN9_FEATURES,
+   .is_coffeelake = true,
+   .gt = 2,
+
+   .num_slices = 1,
+   .l3_banks = 4,
+};
+
+static const struct gen_device_info gen_device_info_cfl_gt3 = {
+   GEN9_FEATURES,
+   .is_coffeelake = true,
+   .gt = 3,
+
+   .num_slices = 2,
+   .l3_banks = 8,
+};
+
 #define GEN10_HW_INFO                               \
    .gen = 10,                                       \
    .num_thread_per_eu = 7,                          \
diff --git a/src/intel/common/gen_device_info.h b/src/intel/common/gen_device_info.h
index cc83857b759..a83251ccfc9 100644
--- a/src/intel/common/gen_device_info.h
+++ b/src/intel/common/gen_device_info.h
@@ -46,6 +46,7 @@ struct gen_device_info
    bool is_broxton;
    bool is_kabylake;
    bool is_geminilake;
+   bool is_coffeelake;
    bool is_cannonlake;
 
    bool has_hiz_and_separate_stencil;