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authorAnuj Phogat <anuj.phogat@gmail.com>2017-06-05 08:31:01 -0700
committerAnuj Phogat <anuj.phogat@gmail.com>2017-06-22 14:17:45 -0700
commitceed55e7bba30b60a727309616d6f7e3c2e48a5a (patch)
tree75f1fd9cd7a289e86fa0b9fca3ec24c571799278 /src/intel
parent6338b63270e0676f7524c70fbbf4967e43524bd2 (diff)
intel/genxml: Add Gen10 CACHE_MODE_1 definitions
Few of the fields in this register are changed as compared to gen9.xml. V2: Remove some fields which are not valid anymore. Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com> Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Diffstat (limited to 'src/intel')
-rw-r--r--src/intel/genxml/gen10.xml18
1 files changed, 18 insertions, 0 deletions
diff --git a/src/intel/genxml/gen10.xml b/src/intel/genxml/gen10.xml
index d2bb130004e..a19674a435f 100644
--- a/src/intel/genxml/gen10.xml
+++ b/src/intel/genxml/gen10.xml
@@ -3734,4 +3734,22 @@
<field name="Sampler L2 Disable Mask" start="31" end="31" type="bool"/>
</register>
+ <register name="CACHE_MODE_1" length="1" num="0x7004">
+ <field name="Partial Resolve Disable In VC" start="1" end="1" type="bool"/>
+ <field name="RCZ PMA Promoted 2 Not-Promoted Allocation stall optimization Disable" start="3" end="3" type="bool"/>
+ <field name="MCS Cache Disable" start="5" end="5" type="bool"/>
+ <field name="MSC RAW Hazard Avoidance Bit" start="9" end="9" type="bool"/>
+ <field name="NP Early Z Fails Disable" start="13" end="13" type="uint"/>
+ <field name="Blend Optimization Fix Disable" start="14" end="14" type="bool"/>
+ <field name="Color Compression Disable" start="15" end="15" type="bool"/>
+
+ <field name="Partial Resolve Disable In VC Mask" start="17" end="17" type="bool"/>
+ <field name="RCZ PMA Promoted 2 Not-Promoted Allocation stall optimization Disable Mask" start="19" end="19" type="bool"/>
+ <field name="MCS Cache Disable Mask" start="21" end="21" type="bool"/>
+ <field name="MSC RAW Hazard Avoidance Bit Mask" start="25" end="25" type="bool"/>
+ <field name="NP Early Z Fails Disable Mask" start="29" end="29" type="bool"/>
+ <field name="Blend Optimization Fix Disable Mask" start="30" end="30" type="bool"/>
+ <field name="Color Compression Disable Mask" start="31" end="31" type="bool"/>
+ </register>
+
</genxml>