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authorNanley Chery <nanley.g.chery@intel.com>2017-04-24 10:20:27 -0700
committerNanley Chery <nanley.g.chery@intel.com>2017-06-26 11:09:12 -0700
commitb9343301913f8d47d175b25d57ec2a0561f5eb6f (patch)
tree43c4882f4a4d0bce0f1298011d1f34e85b04b0c8 /src/intel
parent6b23c65f3ac6281576813b8fc9f9dd31833301f9 (diff)
intel/isl: Limit CCS to one level and layer on gen7
v2 (Jason Ekstrand): - Remove Vulkan-specific terminology from the commit title. - Replace '== 7' with '<= 7' to hint that this is a new feature on BDW+. Signed-off-by: Nanley Chery <nanley.g.chery@intel.com> Reviewed-by: Iago Toral Quiroga <itoral@igalia.com> (v1) Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Diffstat (limited to 'src/intel')
-rw-r--r--src/intel/isl/isl.c9
1 files changed, 7 insertions, 2 deletions
diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c
index 2449ffb29ae..ba56d86c178 100644
--- a/src/intel/isl/isl.c
+++ b/src/intel/isl/isl.c
@@ -1736,14 +1736,19 @@ isl_surf_get_ccs_surf(const struct isl_device *dev,
return false;
}
+ /* Multi-LOD and multi-layer CCS isn't supported on gen7. */
+ const uint8_t levels = ISL_DEV_GEN(dev) <= 7 ? 1 : surf->levels;
+ const uint32_t array_len = ISL_DEV_GEN(dev) <= 7 ?
+ 1 : surf->logical_level0_px.array_len;
+
return isl_surf_init(dev, ccs_surf,
.dim = surf->dim,
.format = ccs_format,
.width = surf->logical_level0_px.width,
.height = surf->logical_level0_px.height,
.depth = surf->logical_level0_px.depth,
- .levels = surf->levels,
- .array_len = surf->logical_level0_px.array_len,
+ .levels = levels,
+ .array_len = array_len,
.samples = 1,
.usage = ISL_SURF_USAGE_CCS_BIT,
.tiling_flags = ISL_TILING_CCS_BIT);