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authorMatt Turner <mattst88@gmail.com>2017-06-30 15:07:10 -0700
committerMatt Turner <mattst88@gmail.com>2017-07-20 16:56:49 -0700
commit1038d385a9b5817132d16f9f5877743d0bb8cca0 (patch)
tree2acb3c00980c276cd34c71959c0cbfb89f1085c5 /src/intel
parent51c1659af8c1e75f96f1643a890b2858ca76b5eb (diff)
nir: Reduce destination size of ballot intrinsic when possible
Some hardware, like i965, doesn't support group sizes greater than 32. In that case, we can reduce the destination size of the ballot intrinsic, which will simplify our code generation. Reviewed-by: Connor Abbott <cwabbott0@gmail.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Diffstat (limited to 'src/intel')
-rw-r--r--src/intel/compiler/brw_compiler.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/intel/compiler/brw_compiler.c b/src/intel/compiler/brw_compiler.c
index 39a8237ff07..e86ab0fc687 100644
--- a/src/intel/compiler/brw_compiler.c
+++ b/src/intel/compiler/brw_compiler.c
@@ -58,6 +58,7 @@ static const struct nir_shader_compiler_options scalar_nir_options = {
.lower_unpack_unorm_2x16 = true,
.lower_unpack_unorm_4x8 = true,
.lower_subgroup_masks = true,
+ .max_subgroup_size = 64, /* FIXME */
.max_unroll_iterations = 32,
};