summaryrefslogtreecommitdiff
path: root/src/intel/vulkan/genX_pipeline.c
diff options
context:
space:
mode:
authorLionel Landwerlin <lionel.g.landwerlin@intel.com>2021-10-11 18:31:26 +0300
committerMarge Bot <emma+marge@anholt.net>2022-03-24 10:49:07 +0000
commita4f502de3228ec37dfcaa38225077ec3709d74ea (patch)
tree2dd6a7588cf87ce41b6b367577fac503b35dd70d /src/intel/vulkan/genX_pipeline.c
parentf348103fce4484b891a58bf3147b71e3a3558135 (diff)
anv: fix VK_DYNAMIC_STATE_COLOR_WRITE_ENABLE_EXT state
First, there is a problem if you do the following vkCmdSetColorWriteEnableEXT(attachmentCount = 8) vkCmdBindPipeline(GFX, with attachmentCount = 4) vkCmdDraw() vkCmdBindPipeline(GFX, with attachmentCount = 8) vkCmdDraw() Because in the dynamic state emission code we rely on the first pipeline to figure the number of BLEND_STATE entries to prepare. This is wrong, we should fill all entries so that the dynamic state works regardless of the number of attachments in the pipeline. With regard to the dynamic values, we should retain enable/disable values that do not concern the current pipeline. Second, 3DSTATE_WM was not always reemitted when the pipeline changed. But since it is not emitted as part of the pipeline, this results in inconsistent state being programmed. Third, we end up disabling the fragment stage completely in some cases. And that is programming the pipeline inconsistently and triggering a hang on TGL. v2: Fix comment (Tapani) Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Fixes: b15bfe92f7f8 ("anv: implement VK_EXT_color_write_enable") Reviewed-by: Tapani Pälli <tapani.palli@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15310>
Diffstat (limited to 'src/intel/vulkan/genX_pipeline.c')
-rw-r--r--src/intel/vulkan/genX_pipeline.c19
1 files changed, 14 insertions, 5 deletions
diff --git a/src/intel/vulkan/genX_pipeline.c b/src/intel/vulkan/genX_pipeline.c
index a78bc3007c9..a1bccf9dc00 100644
--- a/src/intel/vulkan/genX_pipeline.c
+++ b/src/intel/vulkan/genX_pipeline.c
@@ -1434,10 +1434,18 @@ emit_cb_state(struct anv_graphics_pipeline *pipeline,
.SourceAlphaBlendFactor = vk_to_intel_blend[a->srcAlphaBlendFactor],
.DestinationAlphaBlendFactor = vk_to_intel_blend[a->dstAlphaBlendFactor],
.AlphaBlendFunction = vk_to_intel_blend_op[a->alphaBlendOp],
- .WriteDisableAlpha = !(a->colorWriteMask & VK_COLOR_COMPONENT_A_BIT),
- .WriteDisableRed = !(a->colorWriteMask & VK_COLOR_COMPONENT_R_BIT),
- .WriteDisableGreen = !(a->colorWriteMask & VK_COLOR_COMPONENT_G_BIT),
- .WriteDisableBlue = !(a->colorWriteMask & VK_COLOR_COMPONENT_B_BIT),
+ .WriteDisableAlpha =
+ (dynamic_states & ANV_CMD_DIRTY_DYNAMIC_COLOR_BLEND_STATE) == 0 &&
+ !(a->colorWriteMask & VK_COLOR_COMPONENT_A_BIT),
+ .WriteDisableRed =
+ (dynamic_states & ANV_CMD_DIRTY_DYNAMIC_COLOR_BLEND_STATE) == 0 &&
+ !(a->colorWriteMask & VK_COLOR_COMPONENT_R_BIT),
+ .WriteDisableGreen =
+ (dynamic_states & ANV_CMD_DIRTY_DYNAMIC_COLOR_BLEND_STATE) == 0 &&
+ !(a->colorWriteMask & VK_COLOR_COMPONENT_G_BIT),
+ .WriteDisableBlue =
+ (dynamic_states & ANV_CMD_DIRTY_DYNAMIC_COLOR_BLEND_STATE) == 0 &&
+ !(a->colorWriteMask & VK_COLOR_COMPONENT_B_BIT),
};
if (a->srcColorBlendFactor != a->srcAlphaBlendFactor ||
@@ -2253,7 +2261,8 @@ has_color_buffer_write_enabled(const struct anv_graphics_pipeline *pipeline,
if (binding->index == UINT32_MAX)
continue;
- if (blend && blend->pAttachments[binding->index].colorWriteMask != 0)
+ if (blend && binding->index < blend->attachmentCount &&
+ blend->pAttachments[binding->index].colorWriteMask != 0)
return true;
}