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authorTopi Pohjolainen <topi.pohjolainen@intel.com>2020-07-07 23:54:00 -0700
committerSagar Ghuge <sagar.ghuge@intel.com>2021-11-22 21:27:30 -0800
commit261dd6c8f894fe13926ede073669b96652da61db (patch)
treeceecad0d7c72666b51a312cb8ab3b2c980ea0aeb /src/intel/compiler/brw_fs.cpp
parent24831bbd40784c3b24fb95632b9f8e09f6432ace (diff)
intel/compiler: Add new variant for TXF_CMS_W
This allows, for example, fs_inst::components_read() without passing devinfo as extra argument. Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com> Reviewed-by: Francisco Jerez <currojerez@riseup.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11766>
Diffstat (limited to 'src/intel/compiler/brw_fs.cpp')
-rw-r--r--src/intel/compiler/brw_fs.cpp19
1 files changed, 16 insertions, 3 deletions
diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp
index a39c4297cf1..51db62f3e3f 100644
--- a/src/intel/compiler/brw_fs.cpp
+++ b/src/intel/compiler/brw_fs.cpp
@@ -778,6 +778,7 @@ fs_inst::components_read(unsigned i) const
case FS_OPCODE_TXB_LOGICAL:
case SHADER_OPCODE_TXF_CMS_LOGICAL:
case SHADER_OPCODE_TXF_CMS_W_LOGICAL:
+ case SHADER_OPCODE_TXF_CMS_W_GFX12_LOGICAL:
case SHADER_OPCODE_TXF_UMS_LOGICAL:
case SHADER_OPCODE_TXF_MCS_LOGICAL:
case SHADER_OPCODE_LOD_LOGICAL:
@@ -797,9 +798,14 @@ fs_inst::components_read(unsigned i) const
else if (i == TEX_LOGICAL_SRC_TG4_OFFSET)
return 2;
/* MCS */
- else if (i == TEX_LOGICAL_SRC_MCS && opcode == SHADER_OPCODE_TXF_CMS_W_LOGICAL)
- return 2;
- else
+ else if (i == TEX_LOGICAL_SRC_MCS) {
+ if (opcode == SHADER_OPCODE_TXF_CMS_W_LOGICAL)
+ return 2;
+ else if (opcode == SHADER_OPCODE_TXF_CMS_W_GFX12_LOGICAL)
+ return 4;
+ else
+ return 1;
+ } else
return 1;
case SHADER_OPCODE_UNTYPED_SURFACE_READ_LOGICAL:
@@ -7000,6 +7006,7 @@ fs_visitor::lower_logical_sends()
break;
case SHADER_OPCODE_TXF_CMS_W_LOGICAL:
+ case SHADER_OPCODE_TXF_CMS_W_GFX12_LOGICAL:
lower_sampler_logical_send(ibld, inst, SHADER_OPCODE_TXF_CMS_W);
break;
@@ -7632,6 +7639,12 @@ get_lowered_simd_width(const struct intel_device_info *devinfo,
case SHADER_OPCODE_TG4_OFFSET_LOGICAL:
return get_sampler_lowered_simd_width(devinfo, inst);
+ /* On gfx12 parameters are fixed to 16-bit values and therefore they all
+ * always fit regardless of the execution size.
+ */
+ case SHADER_OPCODE_TXF_CMS_W_GFX12_LOGICAL:
+ return MIN2(16, inst->exec_size);
+
case SHADER_OPCODE_TXD_LOGICAL:
/* TXD is unsupported in SIMD16 mode. */
return 8;