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authorMarcin Ĺšlusarz <marcin.slusarz@intel.com>2022-08-12 17:16:17 +0200
committerMarge Bot <emma+marge@anholt.net>2022-08-18 17:48:41 +0000
commit446eeccb1c95f65511aa5ffdfd7f6ce23b1ea83f (patch)
treead197d8ce132fda3684c2540815f68855cc35190 /src/glx/.gitignore
parentddc8ab9e4322bed0ce7e47c986d54c852fb56852 (diff)
intel/compiler: fix mesh urb write regressionHEADmain
Right now even the simplest mesh test (func.mesh.basic.mesh from crucible) fails like this: ASSERT: Scalar MESH validation failed! load_payload(16) vgrf11+0.0:F, vgrf8:D ../../src/intel/compiler/brw_fs_validate.cpp:61: inst->dst.offset / REG_SIZE + regs_written(inst) <= alloc.sizes[inst->dst.nr] Because we try to load 8 regs with LOAD_PAYLOAD in SIMD16 mode. Fixes: 349a040f684 ("intel/fs: Make logical URB write instructions more like other logical instructions") Reviewed-by: Ian Romanick <ian.d.romanick@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18075>
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