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authorKarol Herbst <kherbst@redhat.com>2022-11-16 23:22:13 +0100
committerMarge Bot <emma+marge@anholt.net>2023-03-31 20:29:00 +0000
commit6305d1cb1cccf22cc2be4d6e0035eaeb042f5157 (patch)
tree980a0eb7d10abe00c154fe4a324ce95d12e60af8 /src/gallium
parent87147e2b097b09d58267e6584cb96de43173bbf3 (diff)
gallium: add get_compute_state_info
Signed-off-by: Karol Herbst <kherbst@redhat.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19855>
Diffstat (limited to 'src/gallium')
-rw-r--r--src/gallium/include/pipe/p_context.h4
-rw-r--r--src/gallium/include/pipe/p_state.h21
2 files changed, 25 insertions, 0 deletions
diff --git a/src/gallium/include/pipe/p_context.h b/src/gallium/include/pipe/p_context.h
index c59dde608ca..dd4529f0251 100644
--- a/src/gallium/include/pipe/p_context.h
+++ b/src/gallium/include/pipe/p_context.h
@@ -46,6 +46,7 @@ struct pipe_blend_state;
struct pipe_blit_info;
struct pipe_box;
struct pipe_clip_state;
+struct pipe_compute_state_object_info;
struct pipe_constant_buffer;
struct pipe_depth_stencil_alpha_state;
struct pipe_device_reset_callback;
@@ -933,6 +934,9 @@ struct pipe_context {
void (*bind_compute_state)(struct pipe_context *, void *);
void (*delete_compute_state)(struct pipe_context *, void *);
+ void (*get_compute_state_info)(struct pipe_context *, void *,
+ struct pipe_compute_state_object_info *);
+
/**
* Bind an array of shader resources that will be used by the
* compute program. Any resources that were previously bound to
diff --git a/src/gallium/include/pipe/p_state.h b/src/gallium/include/pipe/p_state.h
index c62dd3c5479..b84a333f2a0 100644
--- a/src/gallium/include/pipe/p_state.h
+++ b/src/gallium/include/pipe/p_state.h
@@ -1034,6 +1034,27 @@ struct pipe_compute_state
unsigned req_input_mem; /**< Required size of the INPUT resource. */
};
+struct pipe_compute_state_object_info
+{
+ /**
+ * Max number of threads per block supported for the given cso.
+ */
+ unsigned max_threads;
+
+ /**
+ * Which multiple should the block size be of for best performance.
+ *
+ * E.g. for 8 a block with n * 8 threads would result in optimal utilization
+ * of the hardware.
+ */
+ unsigned preferred_simd_size;
+
+ /**
+ * How much private memory does this CSO require per thread (a.k.a. NIR scratch memory).
+ */
+ unsigned private_memory;
+};
+
/**
* Structure that contains a callback for device reset messages from the driver
* back to the gallium frontend.