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authorAnuj Phogat <anuj.phogat@gmail.com>2020-11-05 10:33:44 -0800
committerAnuj Phogat <anuj.phogat@gmail.com>2020-11-09 21:29:04 +0000
commit3c4e43e72be3bcb70d7cfb9abcaf77d4c0c75f57 (patch)
tree7803258ac5ef1bfbe891f7ae345305f1396fc519 /src/gallium
parenta1a365e8188bd72be27404dd669cad90468bc09f (diff)
intel: Pointer to SCISSOR_RECT array should be 64B aligned20.3-branchpoint
v2: Apply the workaround to all gen hardawre Ref: GEN:BUG:1409725701 Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com> Reviewed-by: Ivan Briano <ivan.briano@intel.com> Reviewed-by: Nanley Chery <nanley.g.chery@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7463>
Diffstat (limited to 'src/gallium')
-rw-r--r--src/gallium/drivers/iris/iris_state.c9
1 files changed, 8 insertions, 1 deletions
diff --git a/src/gallium/drivers/iris/iris_state.c b/src/gallium/drivers/iris/iris_state.c
index ab7d3d0ac37..b0546595c10 100644
--- a/src/gallium/drivers/iris/iris_state.c
+++ b/src/gallium/drivers/iris/iris_state.c
@@ -6055,12 +6055,19 @@ iris_upload_dirty_render_state(struct iris_context *ice,
}
if (dirty & IRIS_DIRTY_SCISSOR_RECT) {
+ /* GEN:BUG:1409725701:
+ * "The viewport-specific state used by the SF unit (SCISSOR_RECT) is
+ * stored as an array of up to 16 elements. The location of first
+ * element of the array, as specified by Pointer to SCISSOR_RECT,
+ * should be aligned to a 64-byte boundary.
+ */
+ uint32_t alignment = 64;
uint32_t scissor_offset =
emit_state(batch, ice->state.dynamic_uploader,
&ice->state.last_res.scissor,
ice->state.scissors,
sizeof(struct pipe_scissor_state) *
- ice->state.num_viewports, 32);
+ ice->state.num_viewports, alignment);
iris_emit_cmd(batch, GENX(3DSTATE_SCISSOR_STATE_POINTERS), ptr) {
ptr.ScissorRectPointer = scissor_offset;