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authorMarek Olšák <marek.olsak@amd.com>2018-11-23 18:20:49 -0500
committerMarek Olšák <marek.olsak@amd.com>2018-11-28 20:20:27 -0500
commit98f2312b4faf22cb545a7769f230f1713b4f3de1 (patch)
tree84e3e073c7883079153e60e151720df3337563e2 /src/gallium/winsys/amdgpu
parent5f9ccf827e0aaff3c8571b3d226e33d6e98d4a6f (diff)
winsys/amdgpu: clean up code around BO VM alignment
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Diffstat (limited to 'src/gallium/winsys/amdgpu')
-rw-r--r--src/gallium/winsys/amdgpu/drm/amdgpu_bo.c9
1 files changed, 7 insertions, 2 deletions
diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c b/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c
index e7db383c69b..dd3e8984dac 100644
--- a/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c
+++ b/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c
@@ -488,10 +488,15 @@ static struct amdgpu_winsys_bo *amdgpu_create_bo(struct amdgpu_winsys *ws,
}
va_gap_size = ws->check_vm ? MAX2(4 * alignment, 64 * 1024) : 0;
+
+ unsigned vm_alignment = alignment;
+
+ /* Increase the VM alignment for faster address translation. */
if (size > ws->info.pte_fragment_size)
- alignment = MAX2(alignment, ws->info.pte_fragment_size);
+ vm_alignment = MAX2(vm_alignment, ws->info.pte_fragment_size);
+
r = amdgpu_va_range_alloc(ws->dev, amdgpu_gpu_va_range_general,
- size + va_gap_size, alignment, 0, &va, &va_handle,
+ size + va_gap_size, vm_alignment, 0, &va, &va_handle,
(flags & RADEON_FLAG_32BIT ? AMDGPU_VA_RANGE_32_BIT : 0) |
AMDGPU_VA_RANGE_HIGH);
if (r)