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authorEric Anholt <eric@anholt.net>2018-08-07 13:47:08 -0700
committerEric Anholt <eric@anholt.net>2018-08-07 17:00:22 -0700
commit69158c452bb39cd3d12110dd623aff09e771fa77 (patch)
treee0a9078dd391a07e5e8d87d9a979dadc7ffe3ed2 /src/gallium/drivers/vc4
parente24a8e523209b40734aab0fbd8465a0278c8e5a3 (diff)
vc4: Ignore samplers for finding uniform offsets.
Fixes: dEQP-GLES2.shaders.struct.uniform.sampler_array_fragment dEQP-GLES2.shaders.struct.uniform.sampler_array_vertex dEQP-GLES2.shaders.struct.uniform.sampler_nested_fragment dEQP-GLES2.shaders.struct.uniform.sampler_nested_vertex Cc: mesa-stable@lists.freedesktop.org
Diffstat (limited to 'src/gallium/drivers/vc4')
-rw-r--r--src/gallium/drivers/vc4/vc4_program.c17
1 files changed, 14 insertions, 3 deletions
diff --git a/src/gallium/drivers/vc4/vc4_program.c b/src/gallium/drivers/vc4/vc4_program.c
index 13c3b7678b2..1d767af1bdb 100644
--- a/src/gallium/drivers/vc4/vc4_program.c
+++ b/src/gallium/drivers/vc4/vc4_program.c
@@ -38,6 +38,7 @@
#include "vc4_context.h"
#include "vc4_qpu.h"
#include "vc4_qir.h"
+#include "mesa/state_tracker/st_glsl_types.h"
static struct qreg
ntq_get_src(struct vc4_compile *c, nir_src src, int i);
@@ -50,6 +51,12 @@ type_size(const struct glsl_type *type)
return glsl_count_attribute_slots(type, false);
}
+static int
+uniforms_type_size(const struct glsl_type *type)
+{
+ return st_glsl_storage_type_size(type, false);
+}
+
static void
resize_qreg_array(struct vc4_compile *c,
struct qreg **regs,
@@ -1685,7 +1692,7 @@ static void
ntq_setup_uniforms(struct vc4_compile *c)
{
nir_foreach_variable(var, &c->s->uniforms) {
- uint32_t vec4_count = type_size(var->type);
+ uint32_t vec4_count = uniforms_type_size(var->type);
unsigned vec4_size = 4 * sizeof(float);
declare_uniform_range(c, var->data.driver_location * vec4_size,
@@ -2469,9 +2476,13 @@ vc4_shader_state_create(struct pipe_context *pctx,
*/
s = cso->ir.nir;
- NIR_PASS_V(s, nir_lower_io, nir_var_all, type_size,
+ NIR_PASS_V(s, nir_lower_io, nir_var_all & ~nir_var_uniform,
+ type_size,
(nir_lower_io_options)0);
- } else {
+ NIR_PASS_V(s, nir_lower_io, nir_var_uniform,
+ uniforms_type_size,
+ (nir_lower_io_options)0);
+ } else {
assert(cso->type == PIPE_SHADER_IR_TGSI);
if (vc4_debug & VC4_DEBUG_TGSI) {