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authorMarek Olšák <marek.olsak@amd.com>2020-12-21 03:01:34 -0500
committerMarge Bot <eric+marge@anholt.net>2021-01-27 23:53:34 +0000
commit72ff66c3d739af30d065ed08defb3aac1dcf3735 (patch)
tree2ea29abb794a0bd7a52ee2ce0a60c8d6162693c6 /src/gallium/drivers/radeonsi
parent0278d1fa323cf1f289a2c5f4cd803c4203d4a48a (diff)
gallium: add unbind_num_trailing_slots to set_shader_images
Instead of calling this function again to unbind trailing slots, extend it to do it when images are being set. This reduces CPU overhead. Only st/mesa benefits. Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8298>
Diffstat (limited to 'src/gallium/drivers/radeonsi')
-rw-r--r--src/gallium/drivers/radeonsi/si_compute_blit.c16
-rw-r--r--src/gallium/drivers/radeonsi/si_descriptors.c8
2 files changed, 14 insertions, 10 deletions
diff --git a/src/gallium/drivers/radeonsi/si_compute_blit.c b/src/gallium/drivers/radeonsi/si_compute_blit.c
index 9bc74b2c2ad..ca5fd5391c5 100644
--- a/src/gallium/drivers/radeonsi/si_compute_blit.c
+++ b/src/gallium/drivers/radeonsi/si_compute_blit.c
@@ -534,7 +534,7 @@ void si_compute_copy_image(struct si_context *sctx, struct pipe_resource *dst, u
if (is_dcc_decompress)
image[1].access |= SI_IMAGE_ACCESS_DCC_OFF;
- ctx->set_shader_images(ctx, PIPE_SHADER_COMPUTE, 0, 2, image);
+ ctx->set_shader_images(ctx, PIPE_SHADER_COMPUTE, 0, 2, 0, image);
struct pipe_grid_info info = {0};
@@ -603,7 +603,7 @@ void si_compute_copy_image(struct si_context *sctx, struct pipe_resource *dst, u
si_launch_grid_internal(sctx, &info, saved_cs,
SI_CS_WAIT_FOR_IDLE | SI_CS_IMAGE_OP);
- ctx->set_shader_images(ctx, PIPE_SHADER_COMPUTE, 0, 2, saved_image);
+ ctx->set_shader_images(ctx, PIPE_SHADER_COMPUTE, 0, 2, 0, saved_image);
for (int i = 0; i < 2; i++)
pipe_resource_reference(&saved_image[i].resource, NULL);
if (!is_dcc_decompress) {
@@ -652,7 +652,7 @@ void si_retile_dcc(struct si_context *sctx, struct si_texture *tex)
img[2].u.buf.offset = tex->surface.display_dcc_offset;
img[2].u.buf.size = tex->surface.u.gfx9.display_dcc_size;
- ctx->set_shader_images(ctx, PIPE_SHADER_COMPUTE, 0, 3, img);
+ ctx->set_shader_images(ctx, PIPE_SHADER_COMPUTE, 0, 3, 0, img);
/* Bind the compute shader. */
if (!sctx->cs_dcc_retile)
@@ -679,7 +679,7 @@ void si_retile_dcc(struct si_context *sctx, struct si_texture *tex)
*/
/* Restore states. */
- ctx->set_shader_images(ctx, PIPE_SHADER_COMPUTE, 0, 3, saved_img);
+ ctx->set_shader_images(ctx, PIPE_SHADER_COMPUTE, 0, 3, 0, saved_img);
for (unsigned i = 0; i < 3; i++) {
pipe_resource_reference(&saved_img[i].resource, NULL);
@@ -717,7 +717,7 @@ void si_compute_expand_fmask(struct pipe_context *ctx, struct pipe_resource *tex
if (is_array)
image.u.tex.last_layer = tex->array_size - 1;
- ctx->set_shader_images(ctx, PIPE_SHADER_COMPUTE, 0, 1, &image);
+ ctx->set_shader_images(ctx, PIPE_SHADER_COMPUTE, 0, 1, 0, &image);
/* Bind the shader. */
void **shader = &sctx->cs_fmask_expand[log_samples - 1][is_array];
@@ -740,7 +740,7 @@ void si_compute_expand_fmask(struct pipe_context *ctx, struct pipe_resource *tex
SI_CS_WAIT_FOR_IDLE | SI_CS_IMAGE_OP);
/* Restore previous states. */
- ctx->set_shader_images(ctx, PIPE_SHADER_COMPUTE, 0, 1, &saved_image);
+ ctx->set_shader_images(ctx, PIPE_SHADER_COMPUTE, 0, 1, 0, &saved_image);
pipe_resource_reference(&saved_image.resource, NULL);
/* Array of fully expanded FMASK values, arranged by [log2(fragments)][log2(samples)-1]. */
@@ -819,7 +819,7 @@ void si_compute_clear_render_target(struct pipe_context *ctx, struct pipe_surfac
image.u.tex.first_layer = 0; /* 3D images ignore first_layer (BASE_ARRAY) */
image.u.tex.last_layer = dstsurf->u.tex.last_layer;
- ctx->set_shader_images(ctx, PIPE_SHADER_COMPUTE, 0, 1, &image);
+ ctx->set_shader_images(ctx, PIPE_SHADER_COMPUTE, 0, 1, 0, &image);
struct pipe_grid_info info = {0};
@@ -852,7 +852,7 @@ void si_compute_clear_render_target(struct pipe_context *ctx, struct pipe_surfac
SI_CS_WAIT_FOR_IDLE | SI_CS_IMAGE_OP |
(render_condition_enabled ? SI_CS_RENDER_COND_ENABLE : 0));
- ctx->set_shader_images(ctx, PIPE_SHADER_COMPUTE, 0, 1, &saved_image);
+ ctx->set_shader_images(ctx, PIPE_SHADER_COMPUTE, 0, 1, 0, &saved_image);
ctx->set_constant_buffer(ctx, PIPE_SHADER_COMPUTE, 0, true, &saved_cb);
pipe_resource_reference(&saved_image.resource, NULL);
}
diff --git a/src/gallium/drivers/radeonsi/si_descriptors.c b/src/gallium/drivers/radeonsi/si_descriptors.c
index ccaa2800c2f..6139769c86a 100644
--- a/src/gallium/drivers/radeonsi/si_descriptors.c
+++ b/src/gallium/drivers/radeonsi/si_descriptors.c
@@ -803,6 +803,7 @@ static void si_set_shader_image(struct si_context *ctx, unsigned shader, unsigne
static void si_set_shader_images(struct pipe_context *pipe, enum pipe_shader_type shader,
unsigned start_slot, unsigned count,
+ unsigned unbind_num_trailing_slots,
const struct pipe_image_view *views)
{
struct si_context *ctx = (struct si_context *)pipe;
@@ -810,10 +811,10 @@ static void si_set_shader_images(struct pipe_context *pipe, enum pipe_shader_typ
assert(shader < SI_NUM_SHADERS);
- if (!count)
+ if (!count && !unbind_num_trailing_slots)
return;
- assert(start_slot + count <= SI_NUM_IMAGES);
+ assert(start_slot + count + unbind_num_trailing_slots <= SI_NUM_IMAGES);
if (views) {
for (i = 0, slot = start_slot; i < count; ++i, ++slot)
@@ -823,6 +824,9 @@ static void si_set_shader_images(struct pipe_context *pipe, enum pipe_shader_typ
si_set_shader_image(ctx, shader, slot, NULL, false);
}
+ for (i = 0; i < unbind_num_trailing_slots; ++i, ++slot)
+ si_set_shader_image(ctx, shader, slot, NULL, false);
+
if (shader == PIPE_SHADER_COMPUTE &&
ctx->cs_shader_state.program &&
start_slot < ctx->cs_shader_state.program->sel.cs_num_images_in_user_sgprs)