summaryrefslogtreecommitdiff
path: root/src/gallium/drivers/radeonsi/si_pipe.h
diff options
context:
space:
mode:
authorPierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>2021-02-12 14:42:10 +0100
committerMarge Bot <eric+marge@anholt.net>2021-02-17 09:11:46 +0000
commita8373b3d3876afa960ead3378adacc43afcec6ed (patch)
treed9b649531e823d777f73ac8b7637668a844d4b6b /src/gallium/drivers/radeonsi/si_pipe.h
parent47ed0091943871a6370a3ad5a0c5f510da272c45 (diff)
radeonsi: store si_context::xxx_shader members in union
This allows to access them individually (sctx->shader.ps) or using array indexing (sctx->shaders[PIPE_SHADER_FRAGMENT]). Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8869>
Diffstat (limited to 'src/gallium/drivers/radeonsi/si_pipe.h')
-rw-r--r--src/gallium/drivers/radeonsi/si_pipe.h31
1 files changed, 18 insertions, 13 deletions
diff --git a/src/gallium/drivers/radeonsi/si_pipe.h b/src/gallium/drivers/radeonsi/si_pipe.h
index d725a5b17a4..27da51eaff8 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.h
+++ b/src/gallium/drivers/radeonsi/si_pipe.h
@@ -1042,11 +1042,16 @@ struct si_context {
struct si_pm4_state *vgt_shader_config[SI_NUM_VGT_STAGES_STATES];
/* shaders */
- struct si_shader_ctx_state ps_shader;
- struct si_shader_ctx_state gs_shader;
- struct si_shader_ctx_state vs_shader;
- struct si_shader_ctx_state tcs_shader;
- struct si_shader_ctx_state tes_shader;
+ union {
+ struct {
+ struct si_shader_ctx_state vs;
+ struct si_shader_ctx_state ps;
+ struct si_shader_ctx_state gs;
+ struct si_shader_ctx_state tcs;
+ struct si_shader_ctx_state tes;
+ } shader;
+ struct si_shader_ctx_state shaders[SI_NUM_GRAPHICS_SHADERS];
+ };
struct si_shader_ctx_state cs_prim_discard_state;
struct si_cs_shader_state cs_shader_state;
@@ -1684,17 +1689,17 @@ static ALWAYS_INLINE struct si_shader_ctx_state *
si_get_vs_inline(struct si_context *sctx, enum si_has_tess has_tess, enum si_has_gs has_gs)
{
if (has_gs)
- return &sctx->gs_shader;
+ return &sctx->shader.gs;
if (has_tess)
- return &sctx->tes_shader;
+ return &sctx->shader.tes;
- return &sctx->vs_shader;
+ return &sctx->shader.vs;
}
static inline struct si_shader_ctx_state *si_get_vs(struct si_context *sctx)
{
- return si_get_vs_inline(sctx, sctx->tes_shader.cso ? TESS_ON : TESS_OFF,
- sctx->gs_shader.cso ? GS_ON : GS_OFF);
+ return si_get_vs_inline(sctx, sctx->shader.tes.cso ? TESS_ON : TESS_OFF,
+ sctx->shader.gs.cso ? GS_ON : GS_OFF);
}
static inline struct si_shader_info *si_get_vs_info(struct si_context *sctx)
@@ -1819,7 +1824,7 @@ static inline unsigned si_get_total_colormask(struct si_context *sctx)
if (sctx->queued.named.rasterizer->rasterizer_discard)
return 0;
- struct si_shader_selector *ps = sctx->ps_shader.cso;
+ struct si_shader_selector *ps = sctx->shader.ps.cso;
if (!ps)
return 0;
@@ -1962,8 +1967,8 @@ static inline unsigned si_get_shader_wave_size(struct si_shader *shader)
static inline void si_select_draw_vbo(struct si_context *sctx)
{
sctx->b.draw_vbo = sctx->draw_vbo[sctx->chip_class - GFX6]
- [!!sctx->tes_shader.cso]
- [!!sctx->gs_shader.cso]
+ [!!sctx->shader.tes.cso]
+ [!!sctx->shader.gs.cso]
[sctx->ngg]
[si_compute_prim_discard_enabled(sctx)];
assert(sctx->b.draw_vbo);