diff options
| author | Marek Olšák <marek.olsak@amd.com> | 2016-11-04 12:31:53 +0100 |
|---|---|---|
| committer | Marek Olšák <marek.olsak@amd.com> | 2016-11-10 18:34:55 +0100 |
| commit | 3f6e0063c8e06856004bed9b6bccc2492e351d5a (patch) | |
| tree | 888d1b24b2b8117de53ac28a00457c189a836b30 /src/gallium/drivers/radeonsi/si_pipe.c | |
| parent | 0187f884533203df9a0ca393b370af2ed2328794 (diff) | |
radeonsi: increase MAX_CONTROL_FLOW_DEPTH AKA MaxIfDepth
we don't want to lower deep IFs unconditionally
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Diffstat (limited to 'src/gallium/drivers/radeonsi/si_pipe.c')
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_pipe.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c index 273633cdb48..900de9fa214 100644 --- a/src/gallium/drivers/radeonsi/si_pipe.c +++ b/src/gallium/drivers/radeonsi/si_pipe.c @@ -608,9 +608,8 @@ static int si_get_shader_param(struct pipe_screen* pscreen, unsigned shader, enu case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS: case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS: case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS: - return 16384; case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH: - return 32; + return 16384; case PIPE_SHADER_CAP_MAX_INPUTS: return shader == PIPE_SHADER_VERTEX ? SI_NUM_VERTEX_BUFFERS : 32; case PIPE_SHADER_CAP_MAX_OUTPUTS: |