summaryrefslogtreecommitdiff
path: root/src/gallium/drivers/radeonsi/si_dma.c
diff options
context:
space:
mode:
authorMarek Olšák <marek.olsak@amd.com>2014-08-06 22:29:27 +0200
committerMarek Olšák <marek.olsak@amd.com>2014-08-09 23:41:15 +0200
commit1c03a690bfc3265c7fefa7f87e69782a6672a9b2 (patch)
tree8baba30546ade6377f1f9cbd29d9433b9392dd21 /src/gallium/drivers/radeonsi/si_dma.c
parente878e154cdfd4dbb5474f776e0a6d86fcb983098 (diff)
radeonsi: use gpu_address from r600_resource
Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'src/gallium/drivers/radeonsi/si_dma.c')
-rw-r--r--src/gallium/drivers/radeonsi/si_dma.c12
1 files changed, 6 insertions, 6 deletions
diff --git a/src/gallium/drivers/radeonsi/si_dma.c b/src/gallium/drivers/radeonsi/si_dma.c
index 26f1e1b63ad..e90874624ed 100644
--- a/src/gallium/drivers/radeonsi/si_dma.c
+++ b/src/gallium/drivers/radeonsi/si_dma.c
@@ -75,8 +75,8 @@ static void si_dma_copy_buffer(struct si_context *ctx,
util_range_add(&rdst->valid_buffer_range, dst_offset,
dst_offset + size);
- dst_offset += r600_resource_va(&ctx->screen->b.b, dst);
- src_offset += r600_resource_va(&ctx->screen->b.b, src);
+ dst_offset += rdst->gpu_address;
+ src_offset += rsrc->gpu_address;
/* see if we use dword or byte copy */
if (!(dst_offset % 4) && !(src_offset % 4) && !(size % 4)) {
@@ -175,8 +175,8 @@ static void si_dma_copy_tile(struct si_context *ctx,
util_format_has_stencil(util_format_description(src->format)));
nbanks = si_num_banks(sscreen, rsrc->surface.bpe, rsrc->surface.tile_split,
tile_mode_index);
- base += r600_resource_va(&ctx->screen->b.b, src);
- addr += r600_resource_va(&ctx->screen->b.b, dst);
+ base += rsrc->resource.gpu_address;
+ addr += rdst->resource.gpu_address;
} else {
/* L2T */
array_mode = si_array_mode(dst_mode);
@@ -204,8 +204,8 @@ static void si_dma_copy_tile(struct si_context *ctx,
util_format_has_stencil(util_format_description(dst->format)));
nbanks = si_num_banks(sscreen, rdst->surface.bpe, rdst->surface.tile_split,
tile_mode_index);
- base += r600_resource_va(&ctx->screen->b.b, dst);
- addr += r600_resource_va(&ctx->screen->b.b, src);
+ base += rdst->resource.gpu_address;
+ addr += rsrc->resource.gpu_address;
}
pipe_config = cik_db_pipe_config(sscreen, tile_mode_index);