diff options
| author | Marek Olšák <marek.olsak@amd.com> | 2020-05-02 17:58:15 -0400 |
|---|---|---|
| committer | Marge Bot <eric+marge@anholt.net> | 2020-05-05 16:27:29 +0000 |
| commit | 0d83e7f4b9887346e9b7b4d44c068d340aa04f28 (patch) | |
| tree | 980792f85fb321a09f7d05ed6c71e04ebaea74b3 /src/gallium/drivers/radeonsi/si_blit.c | |
| parent | 39571d384e02848aff8c8fe635ff4b93d740aab3 (diff) | |
radeonsi: enable TC-compatible HTILE on demand for best Z/S performance
I haven't measured this, but it can only help.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4866>
Diffstat (limited to 'src/gallium/drivers/radeonsi/si_blit.c')
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_blit.c | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/src/gallium/drivers/radeonsi/si_blit.c b/src/gallium/drivers/radeonsi/si_blit.c index 057cdc6ce31..12bea9eba31 100644 --- a/src/gallium/drivers/radeonsi/si_blit.c +++ b/src/gallium/drivers/radeonsi/si_blit.c @@ -359,6 +359,17 @@ static void si_decompress_depth(struct si_context *sctx, struct si_texture *tex, tex->stencil_dirty_level_mask &= ~levels_s; } + /* We just had to completely decompress Z/S for texturing. Enable + * TC-compatible HTILE on the next clear, so that the decompression + * doesn't have to be done for this texture ever again. + * + * TC-compatible HTILE might slightly reduce Z/S performance, but + * the decompression is much worse. + */ + if (has_htile && !tc_compat_htile && + tex->surface.flags & RADEON_SURF_TC_COMPATIBLE_HTILE) + tex->enable_tc_compatible_htile_next_clear = true; + /* Only in-place decompression needs to flush DB caches, or * when we don't decompress but TC-compatible planes are dirty. */ |