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authorMarek Olšák <marek.olsak@amd.com>2016-10-27 00:14:16 +0200
committerMarek Olšák <marek.olsak@amd.com>2016-11-01 22:33:13 +0100
commit1a4e0162fc5b2f54bc1db1cd7914200ccac506f1 (patch)
tree8995216a2e752811a6db44ccc2b794bf2e519496 /src/gallium/drivers/radeon
parente3697b4be6667ca5da997ce4e204e071332f8ee2 (diff)
gallium/radeon: make it clear that DRM 2.x.x fast clear constraint is CIK-only
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Diffstat (limited to 'src/gallium/drivers/radeon')
-rw-r--r--src/gallium/drivers/radeon/r600_texture.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/gallium/drivers/radeon/r600_texture.c b/src/gallium/drivers/radeon/r600_texture.c
index 6c8d5a7c103..7ced41c7759 100644
--- a/src/gallium/drivers/radeon/r600_texture.c
+++ b/src/gallium/drivers/radeon/r600_texture.c
@@ -2457,8 +2457,8 @@ void evergreen_do_fast_color_clear(struct r600_common_context *rctx,
continue;
/* fast color clear with 1D tiling doesn't work on old kernels and CIK */
- if (tex->surface.level[0].mode == RADEON_SURF_MODE_1D &&
- rctx->chip_class >= CIK &&
+ if (rctx->chip_class == CIK &&
+ tex->surface.level[0].mode == RADEON_SURF_MODE_1D &&
rctx->screen->info.drm_major == 2 &&
rctx->screen->info.drm_minor < 38) {
continue;