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authorIlia Mirkin <imirkin@alum.mit.edu>2014-09-01 12:48:12 -0400
committerEmil Velikov <emil.l.velikov@gmail.com>2014-09-02 13:35:01 +0100
commiteb7c7032c38166a87878c4d31d6685f30c918854 (patch)
tree8b069a7a8505fcb4f44b1f8710346367298c0f7d /src/gallium/drivers/nouveau
parenta70892679293b3056475beaee4681294966d1698 (diff)
nv50: set the miptree address when clearing bo's in vp2 init
The mt address is about to be used more, make sure it's set appropriately. Reported-by: Emil Velikov <emil.l.velikov@gmail.com> Tested-by: Emil Velikov <emil.l.velikov@gmail.com> Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Cc: "10.2 10.3" <mesa-stable@lists.freedesktop.org> (cherry picked from commit 2528d402b9e35601d4631cd80a301bacd87dfc95)
Diffstat (limited to 'src/gallium/drivers/nouveau')
-rw-r--r--src/gallium/drivers/nouveau/nv50/nv84_video.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/gallium/drivers/nouveau/nv50/nv84_video.c b/src/gallium/drivers/nouveau/nv50/nv84_video.c
index a39f572f708..b26e1eebfbb 100644
--- a/src/gallium/drivers/nouveau/nv50/nv84_video.c
+++ b/src/gallium/drivers/nouveau/nv50/nv84_video.c
@@ -482,12 +482,14 @@ nv84_create_decoder(struct pipe_context *context,
mip.level[0].pitch = surf.width * 4;
mip.base.domain = NOUVEAU_BO_VRAM;
mip.base.bo = dec->mbring;
+ mip.base.address = dec->mbring->offset;
context->clear_render_target(context, &surf.base, &color, 0, 0, 64, 4760);
surf.offset = dec->vpring->size / 2 - 0x1000;
surf.width = 1024;
surf.height = 1;
mip.level[0].pitch = surf.width * 4;
mip.base.bo = dec->vpring;
+ mip.base.address = dec->vpring->offset;
context->clear_render_target(context, &surf.base, &color, 0, 0, 1024, 1);
surf.offset = dec->vpring->size - 0x1000;
context->clear_render_target(context, &surf.base, &color, 0, 0, 1024, 1);