diff options
author | Samuel Pitoiset <samuel.pitoiset@gmail.com> | 2016-05-25 23:36:48 +0200 |
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committer | Samuel Pitoiset <samuel.pitoiset@gmail.com> | 2016-05-26 19:34:57 +0200 |
commit | c52e92ec3a37c9ab3fb35132e62e1ddf6a770c27 (patch) | |
tree | 95a3c5313a2b3147e55913da302b0b5e860142f2 /src/gallium/drivers/nouveau/nvc0/nvc0_context.h | |
parent | 329d115ac68b40082540cf844c548e0656fbdbf9 (diff) |
nvc0: allow to monitor MP perf counters with compute shaders
To read out MP perf counters we use a compute shader and need to upload
input data like a 64-bits addr used to store the values and a sequence
ID for synchronization. Currently, this input data is uploaded as user
uniforms which means that it's sticked to c0[], but if a compute shader
from a real application is used, monitoring those performance counters
will just overwrite some data and miserably crash.
Instead, sticking the 64-bits addr and the sequence into the driver
constant buffer seems like much better and will allow to monitor
counters with GL 4.3 apps.
Tested on GF119 and GK110, but should not hurt anything on GK104.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Diffstat (limited to 'src/gallium/drivers/nouveau/nvc0/nvc0_context.h')
-rw-r--r-- | src/gallium/drivers/nouveau/nvc0/nvc0_context.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_context.h b/src/gallium/drivers/nouveau/nvc0/nvc0_context.h index 5be78aabebc..c0997583235 100644 --- a/src/gallium/drivers/nouveau/nvc0/nvc0_context.h +++ b/src/gallium/drivers/nouveau/nvc0/nvc0_context.h @@ -133,6 +133,9 @@ /* 8 surfaces, at 16 32-bits integers each */ #define NVC0_CB_AUX_SU_INFO(i) 0x400 + (i) * 16 * 4 #define NVC0_CB_AUX_SU_SIZE (NVC0_MAX_IMAGES * 16 * 4) +/* 1 64-bits address and 1 32-bits sequence */ +#define NVC0_CB_AUX_MP_INFO 0x600 +#define NVC0_CB_AUX_MP_SIZE 3 * 4 /* 4 32-bits floats for the vertex runout, put at the end */ #define NVC0_CB_AUX_RUNOUT_INFO NVC0_CB_USR_SIZE + NVC0_CB_AUX_SIZE |