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authorKarol Herbst <kherbst@redhat.com>2020-06-20 13:50:57 +0200
committerKarol Herbst <kherbst@redhat.com>2020-06-22 00:55:52 +0200
commita5445010e46517708efdcdfd756356bb2193e1bc (patch)
tree21ed24c74149cab9e5099f992264b595fac91a85 /src/gallium/drivers/nouveau/codegen
parenteb6c546493b34f4503132084a881c21868678a92 (diff)
gv100/ir: fix atom cas
Signed-off-by: Karol Herbst <kherbst@redhat.com> Reviewed-by: Ben Skeggs <bskeggs@redhat.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5576>
Diffstat (limited to 'src/gallium/drivers/nouveau/codegen')
-rw-r--r--src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gv100.cpp1
-rw-r--r--src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp3
2 files changed, 3 insertions, 1 deletions
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gv100.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gv100.cpp
index 0fbd47ccf88..9fbea47a8c2 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gv100.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gv100.cpp
@@ -858,6 +858,7 @@ CodeEmitterGV100::emitATOM()
break;
}
emitField(73, 3, dType);
+ emitGPR (64, insn->src(2));
}
emitPRED (81);
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
index f100445e9d0..067f9abaca8 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
@@ -1727,7 +1727,8 @@ NVC0LoweringPass::handleCasExch(Instruction *cas, bool needCctl)
cctl->setPredicate(cas->cc, cas->getPredicate());
}
- if (cas->subOp == NV50_IR_SUBOP_ATOM_CAS) {
+ if (cas->subOp == NV50_IR_SUBOP_ATOM_CAS &&
+ targ->getChipset() < NVISA_GV100_CHIPSET) {
// CAS is crazy. It's 2nd source is a double reg, and the 3rd source
// should be set to the high part of the double reg or bad things will
// happen elsewhere in the universe.