diff options
| author | Ben Skeggs <bskeggs@redhat.com> | 2020-06-07 09:51:51 +1000 |
|---|---|---|
| committer | Marge Bot <eric+marge@anholt.net> | 2020-06-10 22:52:41 +0000 |
| commit | 60b28f7a5031324469a751cfbf9567204c4fc313 (patch) | |
| tree | 5961832c7ee62b496fef9f0237871c02bcfa25cb /src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp | |
| parent | ddedfcdf2116396f7630a4604667f946be64c588 (diff) | |
nvir: introduce OP_BREV with lowering to EXTBF_REV for current GPUs
SM70 has this instruction, but no BFE.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377>
Diffstat (limited to 'src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp')
| -rw-r--r-- | src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp index a60881000fe..ccdc2f98ef6 100644 --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp @@ -310,6 +310,14 @@ NVC0LegalizeSSA::handleSET(CmpInstruction *cmp) cmp->sType = hTy; } +void +NVC0LegalizeSSA::handleBREV(Instruction *i) +{ + i->op = OP_EXTBF; + i->subOp = NV50_IR_SUBOP_EXTBF_REV; + i->setSrc(1, bld.mkImm(0x2000)); +} + bool NVC0LegalizeSSA::visit(Function *fn) { @@ -354,6 +362,9 @@ NVC0LegalizeSSA::visit(BasicBlock *bb) if (typeSizeof(i->sType) == 8 && i->sType != TYPE_F64) handleSET(i->asCmp()); break; + case OP_BREV: + handleBREV(i); + break; default: break; } |