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authorIlia Mirkin <imirkin@alum.mit.edu>2019-02-02 02:56:48 -0500
committerIlia Mirkin <imirkin@alum.mit.edu>2019-02-06 19:35:57 -0500
commit5de5beedf21306b01730085f8e03d8f424729016 (patch)
treed15d9f6592b14508f7a5141dade370524e9548f4 /src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
parent4443b6ddf2e08d06f3d0457cf20a2e04244cde37 (diff)
nvc0/ir: fix second tex argument after levelZero optimization
We used to pre-set a bunch of extra arguments to a texture instruction in order to force the RA to allocate a register at the boundary of 4. However with the levelZero optimization, which removes a LOD argument when it's uniformly equal to zero, we undid that logic by removing an extra argument. As a result, we could end up with insufficient alignment on the second wide texture argument. Instead we switch to a different method of achieving the same result. The logic runs during the constraint analysis of the RA, and adds unset sources as necessary right before being merged into a wide argument. Fixes MISALIGNED_REG errors in Hitman when run with bindless textures enabled on a GK208. Fixes: 9145873b152 ("nvc0/ir: use levelZero flag when the lod is set to 0") Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Cc: 19.0 <mesa-stable@lists.freedesktop.org>
Diffstat (limited to 'src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp')
-rw-r--r--src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp16
1 files changed, 0 insertions, 16 deletions
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
index 0d9df71d0d3..45474f07547 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
@@ -1126,22 +1126,6 @@ NVC0LoweringPass::handleTEX(TexInstruction *i)
}
}
- if (chipset >= NVISA_GK104_CHIPSET) {
- //
- // If TEX requires more than 4 sources, the 2nd register tuple must be
- // aligned to 4, even if it consists of just a single 4-byte register.
- //
- // XXX HACK: We insert 0 sources to avoid the 5 or 6 regs case.
- //
- int s = i->srcCount(0xff, true);
- if (s > 4 && s < 7) {
- if (i->srcExists(s)) // move potential predicate out of the way
- i->moveSources(s, 7 - s);
- while (s < 7)
- i->setSrc(s++, bld.loadImm(NULL, 0));
- }
- }
-
return true;
}