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authorRhys Perry <pendingchaos02@gmail.com>2019-11-12 15:28:52 +0000
committerDylan Baker <dylan@pnwbakers.com>2019-11-13 12:09:16 -0800
commit992bff94f7a8f58f875191832e13bdb6b64fdfff (patch)
tree768fbc12d6333d3c497d1897ba55504727d0cc7c /src/amd/compiler/aco_instruction_selection.cpp
parent51a15eabe6f8dfadc79b6dc59e37e14d2939a270 (diff)
aco: fix shuffle with uniform operands
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com> Reviewed-by: Daniel Schürmann <daniel@schuermann.dev> Fixes: 93c8ebfa ('aco: Initial commit of independent AMD compiler') (cherry picked from commit f97d9334263a4dd8878c4e259fb5afcdc1334904)
Diffstat (limited to 'src/amd/compiler/aco_instruction_selection.cpp')
-rw-r--r--src/amd/compiler/aco_instruction_selection.cpp12
1 files changed, 6 insertions, 6 deletions
diff --git a/src/amd/compiler/aco_instruction_selection.cpp b/src/amd/compiler/aco_instruction_selection.cpp
index 33242b7f6b7..7bdc21f170d 100644
--- a/src/amd/compiler/aco_instruction_selection.cpp
+++ b/src/amd/compiler/aco_instruction_selection.cpp
@@ -134,10 +134,7 @@ Temp emit_wqm(isel_context *ctx, Temp src, Temp dst=Temp(0, s1), bool program_ne
if (!dst.id())
return src;
- if (src.type() == RegType::vgpr || src.size() > 1)
- bld.copy(Definition(dst), src);
- else
- bld.sop1(aco_opcode::s_mov_b32, Definition(dst), src);
+ bld.copy(Definition(dst), src);
return dst;
}
@@ -148,6 +145,9 @@ Temp emit_wqm(isel_context *ctx, Temp src, Temp dst=Temp(0, s1), bool program_ne
static Temp emit_bpermute(isel_context *ctx, Builder &bld, Temp index, Temp data)
{
+ if (index.regClass() == s1)
+ return bld.vop3(aco_opcode::v_readlane_b32, bld.def(s1), data, index);
+
Temp index_x4 = bld.vop2(aco_opcode::v_lshlrev_b32, bld.def(v1), Operand(2u), index);
/* Currently not implemented on GFX6-7 */
@@ -5557,11 +5557,11 @@ void visit_intrinsic(isel_context *ctx, nir_intrinsic_instr *instr)
}
case nir_intrinsic_shuffle: {
Temp src = get_ssa_temp(ctx, instr->src[0].ssa);
- if (!ctx->divergent_vals[instr->dest.ssa.index]) {
+ if (!ctx->divergent_vals[instr->dest.ssa.index] &&
+ !ctx->divergent_vals[instr->src[0].ssa->index]) {
emit_uniform_subgroup(ctx, instr, src);
} else {
Temp tid = get_ssa_temp(ctx, instr->src[1].ssa);
- assert(tid.regClass() == v1);
Temp dst = get_ssa_temp(ctx, &instr->dest.ssa);
if (src.regClass() == v1) {
emit_wqm(ctx, emit_bpermute(ctx, bld, tid, src), dst);