diff options
author | Marek Olšák <marek.olsak@amd.com> | 2014-07-26 00:48:48 +0200 |
---|---|---|
committer | Carl Worth <cworth@cworth.org> | 2014-07-30 22:09:45 -0700 |
commit | fcb6c0d2b8cb36c3d1b7cbbf3437aeb65a808682 (patch) | |
tree | 598847c711972fe8bcc550a6122dd9837571f18e /src | |
parent | d59406cdb763140037a75e119005a8c0815a1f72 (diff) |
radeonsi: fix CMASK and HTILE calculations for Hawaii
This fixes the checkerboard pattern in glxgears and anything that triggers
fast color clear.
num_channels is always <= 8, but Hawaii has 16 pipes.
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
(cherry picked from commit 9b046474c95f15338d4c748df9b62871bba6f36f)
Diffstat (limited to 'src')
-rw-r--r-- | src/gallium/drivers/radeon/r600_texture.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/gallium/drivers/radeon/r600_texture.c b/src/gallium/drivers/radeon/r600_texture.c index 3a37465b13e..519f0991fc5 100644 --- a/src/gallium/drivers/radeon/r600_texture.c +++ b/src/gallium/drivers/radeon/r600_texture.c @@ -388,7 +388,7 @@ static void si_texture_get_cmask_info(struct r600_common_screen *rscreen, struct r600_cmask_info *out) { unsigned pipe_interleave_bytes = rscreen->tiling_info.group_bytes; - unsigned num_pipes = rscreen->tiling_info.num_channels; + unsigned num_pipes = rscreen->info.r600_num_tile_pipes; unsigned cl_width, cl_height; switch (num_pipes) { @@ -485,7 +485,7 @@ static unsigned si_texture_htile_alloc_size(struct r600_common_screen *rscreen, { unsigned cl_width, cl_height, width, height; unsigned slice_elements, slice_bytes, pipe_interleave_bytes, base_align; - unsigned num_pipes = rscreen->tiling_info.num_channels; + unsigned num_pipes = rscreen->info.r600_num_tile_pipes; /* HTILE is broken with 1D tiling on old kernels and CIK. */ if (rtex->surface.level[0].mode == RADEON_SURF_MODE_1D && |