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authorNanley Chery <nanley.g.chery@intel.com>2018-10-25 14:08:52 -0700
committerNanley Chery <nanley.g.chery@intel.com>2018-10-26 10:34:07 -0700
commit5bcf479524b96554cab7d2429dacf650b4054638 (patch)
treebbb47dda70cc7fc97c9e37f90a5a5fe77de2ce0b /common.py
parent285ebc84c70c8543808d956aae8539ade03ded34 (diff)
intel/blorp: Define the clear value bounds for HiZ clears
Follow the restriction of making sure the clear value is between the min and max values defined in CC_VIEWPORT. Avoids a simulator warning for some piglit tests, one of them being: ./bin/depthstencil-render-miplevels 146 d=z32f_s8 Jason found this to fix incorrect clearing on SKL. Fixes: 09948151ab1d5184b4dd9052bb1f710fa1e00a7b ("intel/blorp: Add the BDW+ optimized HZ_OP sequence to BLORP") Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Tested-by: Jason Ekstrand <jason@jlekstrand.net>
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