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authorLeo Liu <leo.liu@amd.com>2017-06-23 13:21:09 -0400
committerLeo Liu <leo.liu@amd.com>2017-06-27 10:59:44 -0400
commitfad0b4721942d05cba34c0270bafeaecc1292c95 (patch)
treece4ad305a3fec46ea8c1e8842956d959e8e57a48
parentb2e78e79d7c1127af1eb03db431ae69032ca9561 (diff)
radeon/vcn: enable h264 decode entension support
It's enabled through message buffer for UVD Signed-off-by: Leo Liu <leo.liu@amd.com> Acked-by: Christian K├Ânig <christian.koenig@amd.com>
-rw-r--r--src/gallium/drivers/radeon/radeon_vcn_dec.c1
-rw-r--r--src/gallium/drivers/radeon/radeon_vcn_dec.h2
2 files changed, 3 insertions, 0 deletions
diff --git a/src/gallium/drivers/radeon/radeon_vcn_dec.c b/src/gallium/drivers/radeon/radeon_vcn_dec.c
index 82dfa71633a..bd93b849db0 100644
--- a/src/gallium/drivers/radeon/radeon_vcn_dec.c
+++ b/src/gallium/drivers/radeon/radeon_vcn_dec.c
@@ -111,6 +111,7 @@ static rvcn_dec_message_avc_t get_h264_msg(struct radeon_decoder *dec,
result.sps_info_flags |= pic->pps->sps->mb_adaptive_frame_field_flag << 1;
result.sps_info_flags |= pic->pps->sps->frame_mbs_only_flag << 2;
result.sps_info_flags |= pic->pps->sps->delta_pic_order_always_zero_flag << 3;
+ result.sps_info_flags |= 1 << RDECODE_SPS_INFO_H264_EXTENSION_SUPPORT_FLAG_SHIFT;
result.bit_depth_luma_minus8 = pic->pps->sps->bit_depth_luma_minus8;
result.bit_depth_chroma_minus8 = pic->pps->sps->bit_depth_chroma_minus8;
diff --git a/src/gallium/drivers/radeon/radeon_vcn_dec.h b/src/gallium/drivers/radeon/radeon_vcn_dec.h
index d5516b6e90c..accffef6d90 100644
--- a/src/gallium/drivers/radeon/radeon_vcn_dec.h
+++ b/src/gallium/drivers/radeon/radeon_vcn_dec.h
@@ -103,6 +103,8 @@
#define RDECODE_FEEDBACK_PROFILING 0x00000001
+#define RDECODE_SPS_INFO_H264_EXTENSION_SUPPORT_FLAG_SHIFT 7
+
typedef struct rvcn_dec_message_index_s {
unsigned int message_id;
unsigned int offset;