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authorJason Ekstrand <jason.ekstrand@intel.com>2017-11-29 16:22:42 -0800
committerJason Ekstrand <jason.ekstrand@intel.com>2017-12-01 10:14:28 -0800
commitee57b15ec764736e2d5360beaef9fb2045ed0f68 (patch)
treece19b6ddd9e4fed3219862c89dcc3cad169183d0
parenta1b4f1877f2ef7f0e1e10fdcef854391547f1018 (diff)
i965: Disable regular fast-clears (CCS_D) on gen9+
This partially reverts commit 3e57e9494c2279580ad6a83ab8c065d01e7e634e which caused a bunch of GPU hangs on several Source titles. To date, we have no clue why these hangs are actually happening. This undoes the final effect of 3e57e9494c227 and gets us back to not hanging. Tested with Team Fortress 2. Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102435 Fixes: 3e57e9494c2279580ad6a83ab8c065d01e7e634e Cc: mesa-stable@lists.freedesktop.org
-rw-r--r--src/mesa/drivers/dri/i965/brw_meta_util.c11
-rw-r--r--src/mesa/drivers/dri/i965/intel_mipmap_tree.c57
2 files changed, 43 insertions, 25 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_meta_util.c b/src/mesa/drivers/dri/i965/brw_meta_util.c
index d292f5a8e24..ba92168934e 100644
--- a/src/mesa/drivers/dri/i965/brw_meta_util.c
+++ b/src/mesa/drivers/dri/i965/brw_meta_util.c
@@ -293,6 +293,17 @@ brw_is_color_fast_clear_compatible(struct brw_context *brw,
brw->mesa_to_isl_render_format[mt->format])
return false;
+ /* Gen9 doesn't support fast clear on single-sampled SRGB buffers. When
+ * GL_FRAMEBUFFER_SRGB is enabled any color renderbuffers will be
+ * resolved in intel_update_state. In that case it's pointless to do a
+ * fast clear because it's very likely to be immediately resolved.
+ */
+ if (devinfo->gen >= 9 &&
+ mt->surf.samples == 1 &&
+ ctx->Color.sRGBEnabled &&
+ _mesa_get_srgb_format_linear(mt->format) != mt->format)
+ return false;
+
const mesa_format format = _mesa_get_render_format(ctx, mt->format);
if (_mesa_is_format_integer_color(format)) {
if (devinfo->gen >= 8) {
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
index b87d356250a..c1a4ce184f5 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
@@ -207,7 +207,13 @@ intel_miptree_supports_ccs(struct brw_context *brw,
if (!brw->mesa_format_supports_render[mt->format])
return false;
- return true;
+ if (devinfo->gen >= 9) {
+ mesa_format linear_format = _mesa_get_srgb_format_linear(mt->format);
+ const enum isl_format isl_format =
+ brw_isl_format_for_mesa_format(linear_format);
+ return isl_format_supports_ccs_e(&brw->screen->devinfo, isl_format);
+ } else
+ return true;
}
static bool
@@ -250,7 +256,7 @@ intel_miptree_supports_hiz(const struct brw_context *brw,
* our HW tends to support more linear formats than sRGB ones, we use this
* format variant for check for CCS_E compatibility.
*/
-static bool
+MAYBE_UNUSED static bool
format_ccs_e_compat_with_miptree(const struct gen_device_info *devinfo,
const struct intel_mipmap_tree *mt,
enum isl_format access_format)
@@ -284,13 +290,12 @@ intel_miptree_supports_ccs_e(struct brw_context *brw,
if (!intel_miptree_supports_ccs(brw, mt))
return false;
- /* Many window system buffers are sRGB even if they are never rendered as
- * sRGB. For those, we want CCS_E for when sRGBEncode is false. When the
- * surface is used as sRGB, we fall back to CCS_D.
+ /* Fast clear can be also used to clear srgb surfaces by using equivalent
+ * linear format. This trick, however, can't be extended to be used with
+ * lossless compression and therefore a check is needed to see if the format
+ * really is linear.
*/
- mesa_format linear_format = _mesa_get_srgb_format_linear(mt->format);
- enum isl_format isl_format = brw_isl_format_for_mesa_format(linear_format);
- return isl_format_supports_ccs_e(&brw->screen->devinfo, isl_format);
+ return _mesa_get_srgb_format_linear(mt->format) == mt->format;
}
/**
@@ -2681,27 +2686,29 @@ intel_miptree_render_aux_usage(struct brw_context *brw,
return ISL_AUX_USAGE_MCS;
case ISL_AUX_USAGE_CCS_D:
- return mt->mcs_buf ? ISL_AUX_USAGE_CCS_D : ISL_AUX_USAGE_NONE;
-
- case ISL_AUX_USAGE_CCS_E: {
- /* If the format supports CCS_E and is compatible with the miptree,
- * then we can use it.
+ /* If FRAMEBUFFER_SRGB is used on Gen9+ then we need to resolve any of
+ * the single-sampled color renderbuffers because the CCS buffer isn't
+ * supported for SRGB formats. This only matters if FRAMEBUFFER_SRGB is
+ * enabled because otherwise the surface state will be programmed with
+ * the linear equivalent format anyway.
*/
- if (format_ccs_e_compat_with_miptree(&brw->screen->devinfo,
- mt, render_format))
- return ISL_AUX_USAGE_CCS_E;
-
- /* Otherwise, we have to fall back to CCS_D */
+ if (isl_format_is_srgb(render_format) &&
+ _mesa_get_srgb_format_linear(mt->format) != mt->format) {
+ return ISL_AUX_USAGE_NONE;
+ } else if (!mt->mcs_buf) {
+ return ISL_AUX_USAGE_NONE;
+ } else {
+ return ISL_AUX_USAGE_CCS_D;
+ }
- /* gen9 hardware technically supports non-0/1 clear colors with sRGB
- * formats. However, there are issues with blending where it doesn't
- * properly apply the sRGB curve to the clear color when blending.
+ case ISL_AUX_USAGE_CCS_E: {
+ /* Lossless compression is not supported for SRGB formats, it
+ * should be impossible to get here with such surfaces.
*/
- if (blend_enabled && isl_format_is_srgb(render_format) &&
- !isl_color_value_is_zero_one(mt->fast_clear_color, render_format))
- return ISL_AUX_USAGE_NONE;
+ assert(!isl_format_is_srgb(render_format) ||
+ _mesa_get_srgb_format_linear(mt->format) == mt->format);
- return ISL_AUX_USAGE_CCS_D;
+ return ISL_AUX_USAGE_CCS_E;
}
default: