diff options
author | Marek Olšák <marek.olsak@amd.com> | 2020-06-15 22:39:00 -0400 |
---|---|---|
committer | Marge Bot <eric+marge@anholt.net> | 2020-06-26 07:02:57 +0000 |
commit | da78d50bc87ef5db846a942664094b6299cd1888 (patch) | |
tree | 6d16565f6fc67b0ab9224a43e13fb06816f3f114 | |
parent | 7b2a0f880b5964d120d06d1661ee2701333d0e1e (diff) |
radeonsi: make si_pm4_cmd_begin/end static and simplify all usages
There is no longer the confusing trailing si_pm4_cmd_end call.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5603>
-rw-r--r-- | src/gallium/drivers/radeonsi/si_pm4.c | 8 | ||||
-rw-r--r-- | src/gallium/drivers/radeonsi/si_pm4.h | 3 | ||||
-rw-r--r-- | src/gallium/drivers/radeonsi/si_state.c | 6 | ||||
-rw-r--r-- | src/gallium/drivers/radeonsi/si_state_shaders.c | 6 |
4 files changed, 8 insertions, 15 deletions
diff --git a/src/gallium/drivers/radeonsi/si_pm4.c b/src/gallium/drivers/radeonsi/si_pm4.c index a5d93071ecc..a7d57258591 100644 --- a/src/gallium/drivers/radeonsi/si_pm4.c +++ b/src/gallium/drivers/radeonsi/si_pm4.c @@ -26,24 +26,24 @@ #include "sid.h" #include "util/u_memory.h" -void si_pm4_cmd_begin(struct si_pm4_state *state, unsigned opcode) +static void si_pm4_cmd_begin(struct si_pm4_state *state, unsigned opcode) { + assert(state->ndw < SI_PM4_MAX_DW); state->last_opcode = opcode; state->last_pm4 = state->ndw++; } void si_pm4_cmd_add(struct si_pm4_state *state, uint32_t dw) { + assert(state->ndw < SI_PM4_MAX_DW); state->pm4[state->ndw++] = dw; } -void si_pm4_cmd_end(struct si_pm4_state *state, bool predicate) +static void si_pm4_cmd_end(struct si_pm4_state *state, bool predicate) { unsigned count; count = state->ndw - state->last_pm4 - 2; state->pm4[state->last_pm4] = PKT3(state->last_opcode, count, predicate); - - assert(state->ndw <= SI_PM4_MAX_DW); } void si_pm4_set_reg(struct si_pm4_state *state, unsigned reg, uint32_t val) diff --git a/src/gallium/drivers/radeonsi/si_pm4.h b/src/gallium/drivers/radeonsi/si_pm4.h index 37ade60b25a..772512596f1 100644 --- a/src/gallium/drivers/radeonsi/si_pm4.h +++ b/src/gallium/drivers/radeonsi/si_pm4.h @@ -54,10 +54,7 @@ struct si_pm4_state { struct si_atom atom; }; -void si_pm4_cmd_begin(struct si_pm4_state *state, unsigned opcode); void si_pm4_cmd_add(struct si_pm4_state *state, uint32_t dw); -void si_pm4_cmd_end(struct si_pm4_state *state, bool predicate); - void si_pm4_set_reg(struct si_pm4_state *state, unsigned reg, uint32_t val); void si_pm4_clear_state(struct si_pm4_state *state); diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c index 2a0aa64056a..1531ee5cf5e 100644 --- a/src/gallium/drivers/radeonsi/si_state.c +++ b/src/gallium/drivers/radeonsi/si_state.c @@ -5118,15 +5118,13 @@ void si_init_cs_preamble_state(struct si_context *sctx) if (!pm4) return; - si_pm4_cmd_begin(pm4, PKT3_CONTEXT_CONTROL); + si_pm4_cmd_add(pm4, PKT3(PKT3_CONTEXT_CONTROL, 1, 0)); si_pm4_cmd_add(pm4, CC0_UPDATE_LOAD_ENABLES(1)); si_pm4_cmd_add(pm4, CC1_UPDATE_SHADOW_ENABLES(1)); - si_pm4_cmd_end(pm4, false); if (has_clear_state) { - si_pm4_cmd_begin(pm4, PKT3_CLEAR_STATE); + si_pm4_cmd_add(pm4, PKT3(PKT3_CLEAR_STATE, 0, 0)); si_pm4_cmd_add(pm4, 0); - si_pm4_cmd_end(pm4, false); } if (sctx->chip_class <= GFX8) diff --git a/src/gallium/drivers/radeonsi/si_state_shaders.c b/src/gallium/drivers/radeonsi/si_state_shaders.c index 61af8ce2893..cd14fdc741e 100644 --- a/src/gallium/drivers/radeonsi/si_state_shaders.c +++ b/src/gallium/drivers/radeonsi/si_state_shaders.c @@ -3293,14 +3293,12 @@ static void si_cs_preamble_add_vgt_flush(struct si_context *sctx) return; /* Done by Vulkan before VGT_FLUSH. */ - si_pm4_cmd_begin(sctx->cs_preamble_state, PKT3_EVENT_WRITE); + si_pm4_cmd_add(sctx->cs_preamble_state, PKT3(PKT3_EVENT_WRITE, 0, 0)); si_pm4_cmd_add(sctx->cs_preamble_state, EVENT_TYPE(V_028A90_VS_PARTIAL_FLUSH) | EVENT_INDEX(4)); - si_pm4_cmd_end(sctx->cs_preamble_state, false); /* VGT_FLUSH is required even if VGT is idle. It resets VGT pointers. */ - si_pm4_cmd_begin(sctx->cs_preamble_state, PKT3_EVENT_WRITE); + si_pm4_cmd_add(sctx->cs_preamble_state, PKT3(PKT3_EVENT_WRITE, 0, 0)); si_pm4_cmd_add(sctx->cs_preamble_state, EVENT_TYPE(V_028A90_VGT_FLUSH) | EVENT_INDEX(0)); - si_pm4_cmd_end(sctx->cs_preamble_state, false); sctx->cs_preamble_has_vgt_flush = true; } |