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authorMatt Turner <mattst88@gmail.com>2017-01-20 19:03:21 -0800
committerMatt Turner <mattst88@gmail.com>2017-01-20 19:12:24 -0800
commitd871f8e820289750832e45b8d09e80d6bce6fe7e (patch)
treea4cbc0d474140c35eeb3cf42cfd749db91caddd9
parentdb6d23cfd22fbe41e7e7de558c987c065e5f3e15 (diff)
i965: Select DF type for 64-bit integers on Gen < 8.
Gen8 adds Q/UQ types. We attempted to change the types back to DF in the generator (commit c95380c40), but an assertion added in the FP64 series (commit e481dcc3) triggers before that code has a chance to execute. In fact, using Q/UQ in the IR and then changing to DF in the generator would not work in the presence of source modifiers, etc. Fixes: d6fcede6 ("i965: Return Q and UQ types for int64 and uint64") Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
-rw-r--r--src/mesa/drivers/dri/i965/brw_fs_nir.cpp8
-rw-r--r--src/mesa/drivers/dri/i965/brw_nir.c6
-rw-r--r--src/mesa/drivers/dri/i965/brw_nir.h3
-rw-r--r--src/mesa/drivers/dri/i965/brw_vec4_nir.cpp5
4 files changed, 12 insertions, 10 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
index c6c91ebf23c..e1ab59854e6 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
@@ -419,7 +419,7 @@ fs_visitor::optimize_extract_to_float(nir_alu_instr *instr,
src0->op == nir_op_extract_i16 || src0->op == nir_op_extract_i8);
fs_reg op0 = get_nir_src(src0->src[0].src);
- op0.type = brw_type_for_nir_type(
+ op0.type = brw_type_for_nir_type(devinfo,
(nir_alu_type)(nir_op_infos[src0->op].input_types[0] |
nir_src_bit_size(src0->src[0].src)));
op0 = offset(op0, bld, src0->src[0].swizzle[0]);
@@ -554,14 +554,14 @@ fs_visitor::nir_emit_alu(const fs_builder &bld, nir_alu_instr *instr)
fs_inst *inst;
fs_reg result = get_nir_dest(instr->dest.dest);
- result.type = brw_type_for_nir_type(
+ result.type = brw_type_for_nir_type(devinfo,
(nir_alu_type)(nir_op_infos[instr->op].output_type |
nir_dest_bit_size(instr->dest.dest)));
fs_reg op[4];
for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++) {
op[i] = get_nir_src(instr->src[i].src);
- op[i].type = brw_type_for_nir_type(
+ op[i].type = brw_type_for_nir_type(devinfo,
(nir_alu_type)(nir_op_infos[instr->op].input_types[i] |
nir_src_bit_size(instr->src[i].src)));
op[i].abs = instr->src[i].abs;
@@ -4525,7 +4525,7 @@ fs_visitor::nir_emit_texture(const fs_builder &bld, nir_tex_instr *instr)
}
}
- fs_reg dst = bld.vgrf(brw_type_for_nir_type(instr->dest_type), 4);
+ fs_reg dst = bld.vgrf(brw_type_for_nir_type(devinfo, instr->dest_type), 4);
fs_inst *inst = bld.emit(opcode, dst, srcs, ARRAY_SIZE(srcs));
inst->offset = header_bits;
diff --git a/src/mesa/drivers/dri/i965/brw_nir.c b/src/mesa/drivers/dri/i965/brw_nir.c
index 3ead8802927..0a8d3a838b6 100644
--- a/src/mesa/drivers/dri/i965/brw_nir.c
+++ b/src/mesa/drivers/dri/i965/brw_nir.c
@@ -704,7 +704,7 @@ brw_nir_apply_sampler_key(nir_shader *nir,
}
enum brw_reg_type
-brw_type_for_nir_type(nir_alu_type type)
+brw_type_for_nir_type(const struct gen_device_info *devinfo, nir_alu_type type)
{
switch (type) {
case nir_type_uint:
@@ -721,9 +721,9 @@ brw_type_for_nir_type(nir_alu_type type)
case nir_type_float64:
return BRW_REGISTER_TYPE_DF;
case nir_type_int64:
- return BRW_REGISTER_TYPE_Q;
+ return devinfo->gen < 8 ? BRW_REGISTER_TYPE_DF : BRW_REGISTER_TYPE_Q;
case nir_type_uint64:
- return BRW_REGISTER_TYPE_UQ;
+ return devinfo->gen < 8 ? BRW_REGISTER_TYPE_DF : BRW_REGISTER_TYPE_UQ;
default:
unreachable("unknown type");
}
diff --git a/src/mesa/drivers/dri/i965/brw_nir.h b/src/mesa/drivers/dri/i965/brw_nir.h
index 7e2f2799d35..76d7ec89f9b 100644
--- a/src/mesa/drivers/dri/i965/brw_nir.h
+++ b/src/mesa/drivers/dri/i965/brw_nir.h
@@ -129,7 +129,8 @@ nir_shader *brw_nir_apply_sampler_key(nir_shader *nir,
const struct brw_sampler_prog_key_data *key,
bool is_scalar);
-enum brw_reg_type brw_type_for_nir_type(nir_alu_type type);
+enum brw_reg_type brw_type_for_nir_type(const struct gen_device_info *devinfo,
+ nir_alu_type type);
enum glsl_base_type brw_glsl_base_type_for_nir_type(nir_alu_type type);
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp b/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
index 71156ec5b3b..2127415be7a 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
@@ -296,7 +296,7 @@ vec4_visitor::get_nir_dest(const nir_dest &dest, enum brw_reg_type type)
dst_reg
vec4_visitor::get_nir_dest(const nir_dest &dest, nir_alu_type type)
{
- return get_nir_dest(dest, brw_type_for_nir_type(type));
+ return get_nir_dest(dest, brw_type_for_nir_type(devinfo, type));
}
src_reg
@@ -325,7 +325,8 @@ src_reg
vec4_visitor::get_nir_src(const nir_src &src, nir_alu_type type,
unsigned num_components)
{
- return get_nir_src(src, brw_type_for_nir_type(type), num_components);
+ return get_nir_src(src, brw_type_for_nir_type(devinfo, type),
+ num_components);
}
src_reg