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authorBas Nieuwenhuizen <bas@basnieuwenhuizen.nl>2017-03-14 21:46:54 +0100
committerBas Nieuwenhuizen <bas@basnieuwenhuizen.nl>2017-03-14 22:16:34 +0100
commitcce43f6d8c40222099badaf52344d6a0eed993f3 (patch)
treed9b867610bcf0a375d225045dde55ff6d2234ed3
parentfe56c745b8cb562445b318bacbb4267f07e43584 (diff)
radv: Emit cache flushes before CP DMA.
The flushes could be due to TRANSFER barriers. Signed-off-by: Bas Nieuwenhuizen <basni@google.com> Cc: 17.0 <mesa-stable@lists.freedesktop.org> Reviewed-by: Dave Airlie <airlied@redhat.com>
-rw-r--r--src/amd/vulkan/si_cmd_buffer.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/amd/vulkan/si_cmd_buffer.c b/src/amd/vulkan/si_cmd_buffer.c
index 5d35287f8e3..b808052ddb2 100644
--- a/src/amd/vulkan/si_cmd_buffer.c
+++ b/src/amd/vulkan/si_cmd_buffer.c
@@ -998,6 +998,7 @@ void si_cp_dma_buffer_copy(struct radv_cmd_buffer *cmd_buffer,
uint64_t main_src_va, main_dest_va;
uint64_t skipped_size = 0, realign_size = 0;
+ si_emit_cache_flush(cmd_buffer);
if (cmd_buffer->device->physical_device->rad_info.family <= CHIP_CARRIZO ||
cmd_buffer->device->physical_device->rad_info.family == CHIP_STONEY) {
@@ -1061,6 +1062,8 @@ void si_cp_dma_clear_buffer(struct radv_cmd_buffer *cmd_buffer, uint64_t va,
assert(va % 4 == 0 && size % 4 == 0);
+ si_emit_cache_flush(cmd_buffer);
+
while (size) {
unsigned byte_count = MIN2(size, CP_DMA_MAX_BYTE_COUNT);
unsigned dma_flags = 0;