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authorBoyuan Zhang <boyuan.zhang@amd.com>2017-11-08 11:05:36 -0500
committerLeo Liu <leo.liu@amd.com>2017-11-17 12:25:47 -0500
commitc445cdf649da7fb9c6f463e4c24d2dc25bc5d2bf (patch)
tree828da284459e09c2af6bba2c8968387ad6d709d6
parent436a3f8d6d52921d91a2dab53fcfca192037125e (diff)
winsys/amdgpu: add vcn enc cs support
New cs support is needed for vcn encode Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com> Acked-by: Christian K├Ânig <christian.koenig@amd.com>
-rw-r--r--src/gallium/winsys/amdgpu/drm/amdgpu_cs.c7
1 files changed, 6 insertions, 1 deletions
diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c b/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
index 9e10ead9999..2c6856b8cae 100644
--- a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
+++ b/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
@@ -330,7 +330,8 @@ static bool amdgpu_cs_has_user_fence(struct amdgpu_cs_context *cs)
{
return cs->ib[IB_MAIN].ip_type != AMDGPU_HW_IP_UVD &&
cs->ib[IB_MAIN].ip_type != AMDGPU_HW_IP_VCE &&
- cs->ib[IB_MAIN].ip_type != AMDGPU_HW_IP_VCN_DEC;
+ cs->ib[IB_MAIN].ip_type != AMDGPU_HW_IP_VCN_DEC &&
+ cs->ib[IB_MAIN].ip_type != AMDGPU_HW_IP_VCN_ENC;
}
static bool amdgpu_cs_has_chaining(struct amdgpu_cs *cs)
@@ -783,6 +784,10 @@ static bool amdgpu_init_cs_context(struct amdgpu_cs_context *cs,
cs->ib[IB_MAIN].ip_type = AMDGPU_HW_IP_VCN_DEC;
break;
+ case RING_VCN_ENC:
+ cs->ib[IB_MAIN].ip_type = AMDGPU_HW_IP_VCN_ENC;
+ break;
+
default:
case RING_GFX:
cs->ib[IB_MAIN].ip_type = AMDGPU_HW_IP_GFX;