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authorMike Blumenkrantz <michael.blumenkrantz@gmail.com>2021-04-20 17:04:02 -0400
committerMarge Bot <eric+marge@anholt.net>2021-04-26 20:19:48 +0000
commitbee38fba1bc0743d467929b681c22bd2d581726e (patch)
tree07154c85a1b43fbdd629f77cc56219a609d29f7e
parent78232665dbde04c872bb92655d8bf7bb0aa5c23c (diff)
zink: implement VK_EXT_provoking_vertex
this only needs to be set if the mode is LAST, otherwise the normal pipeline state can be used and this one can be omitted Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10458>
-rw-r--r--src/gallium/drivers/zink/zink_pipeline.c9
-rw-r--r--src/gallium/drivers/zink/zink_state.c8
-rw-r--r--src/gallium/drivers/zink/zink_state.h1
3 files changed, 18 insertions, 0 deletions
diff --git a/src/gallium/drivers/zink/zink_pipeline.c b/src/gallium/drivers/zink/zink_pipeline.c
index 3535f69afcb9..1a1b197b0590 100644
--- a/src/gallium/drivers/zink/zink_pipeline.c
+++ b/src/gallium/drivers/zink/zink_pipeline.c
@@ -114,6 +114,15 @@ zink_create_gfx_pipeline(struct zink_screen *screen,
rast_state.depthBiasSlopeFactor = 0.0;
rast_state.lineWidth = 1.0f;
+ VkPipelineRasterizationProvokingVertexStateCreateInfoEXT pv_state;
+ pv_state.sType = VK_STRUCTURE_TYPE_PIPELINE_RASTERIZATION_PROVOKING_VERTEX_STATE_CREATE_INFO_EXT;
+ pv_state.provokingVertexMode = state->rast_state->pv_mode;
+ if (screen->info.have_EXT_provoking_vertex &&
+ state->rast_state->pv_mode == VK_PROVOKING_VERTEX_MODE_LAST_VERTEX_EXT) {
+ pv_state.pNext = rast_state.pNext;
+ rast_state.pNext = &pv_state;
+ }
+
VkPipelineDepthStencilStateCreateInfo depth_stencil_state = {};
depth_stencil_state.sType = VK_STRUCTURE_TYPE_PIPELINE_DEPTH_STENCIL_STATE_CREATE_INFO;
depth_stencil_state.depthTestEnable = state->depth_stencil_alpha_state->depth_test;
diff --git a/src/gallium/drivers/zink/zink_state.c b/src/gallium/drivers/zink/zink_state.c
index a5a6e151c67b..7ef71618dd9b 100644
--- a/src/gallium/drivers/zink/zink_state.c
+++ b/src/gallium/drivers/zink/zink_state.c
@@ -438,6 +438,7 @@ zink_create_rasterizer_state(struct pipe_context *pctx,
state->hw_state.depth_clamp = rs_state->depth_clip_near == 0;
state->hw_state.rasterizer_discard = rs_state->rasterizer_discard;
state->hw_state.force_persample_interp = rs_state->force_persample_interp;
+ state->hw_state.pv_mode = rs_state->flatshade_first ? VK_PROVOKING_VERTEX_MODE_FIRST_VERTEX_EXT : VK_PROVOKING_VERTEX_MODE_LAST_VERTEX_EXT;
assert(rs_state->fill_front <= PIPE_POLYGON_MODE_POINT);
if (rs_state->fill_back != rs_state->fill_front)
@@ -467,12 +468,19 @@ static void
zink_bind_rasterizer_state(struct pipe_context *pctx, void *cso)
{
struct zink_context *ctx = zink_context(pctx);
+ struct zink_screen *screen = zink_screen(pctx->screen);
bool clip_halfz = ctx->rast_state ? ctx->rast_state->base.clip_halfz : false;
bool point_quad_rasterization = ctx->rast_state ? ctx->rast_state->base.point_quad_rasterization : false;
ctx->rast_state = cso;
if (ctx->rast_state) {
if (ctx->gfx_pipeline_state.rast_state != &ctx->rast_state->hw_state) {
+ if (screen->info.have_EXT_provoking_vertex &&
+ (!ctx->gfx_pipeline_state.rast_state ||
+ ctx->gfx_pipeline_state.rast_state->pv_mode != ctx->rast_state->hw_state.pv_mode) &&
+ /* without this prop, change in pv mode requires new rp */
+ !screen->info.pv_props.provokingVertexModePerPipeline)
+ zink_batch_no_rp(ctx);
ctx->gfx_pipeline_state.rast_state = &ctx->rast_state->hw_state;
ctx->gfx_pipeline_state.dirty = true;
}
diff --git a/src/gallium/drivers/zink/zink_state.h b/src/gallium/drivers/zink/zink_state.h
index e49c133c843c..998623d80a50 100644
--- a/src/gallium/drivers/zink/zink_state.h
+++ b/src/gallium/drivers/zink/zink_state.h
@@ -49,6 +49,7 @@ struct zink_rasterizer_hw_state {
VkFrontFace front_face;
VkPolygonMode polygon_mode;
VkCullModeFlags cull_mode;
+ VkProvokingVertexModeEXT pv_mode;
bool force_persample_interp;
};