summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorKenneth Graunke <kenneth@whitecape.org>2019-12-17 00:51:20 -0800
committerKenneth Graunke <kenneth@whitecape.org>2020-01-13 19:42:35 -0800
commita9bd0668d50e17fbe61542a9c6ad723d7fd55ed7 (patch)
tree14f7738b8b526412055cb5f19ec1d2205ac9be26
parentf63d6260d1b570e936c7da587b0028f10368116b (diff)
intel: Use similar brand strings to the Windows drivers
This updates our product name strings to match the ones reported by the Windows driver, which is typically the marketing name. We retain a platform abbreviation and GT level in parenthesis so that we're able to distinguish similar parts more easily, helping us better understand at a glance which GPU a bug reporter has. Acked-by: Matt Turner <mattst88@gmail.com> Acked-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3371> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3371>
-rw-r--r--include/pci_ids/i965_pci_ids.h510
-rw-r--r--include/pci_ids/iris_pci_ids.h12
-rw-r--r--src/intel/dev/gen_device_info.c32
-rw-r--r--src/intel/dev/gen_device_info_test.c2
-rw-r--r--src/loader/pci_id_driver_map.h2
5 files changed, 289 insertions, 269 deletions
diff --git a/include/pci_ids/i965_pci_ids.h b/include/pci_ids/i965_pci_ids.h
index beceaddee56..903f550ba2a 100644
--- a/include/pci_ids/i965_pci_ids.h
+++ b/include/pci_ids/i965_pci_ids.h
@@ -1,247 +1,267 @@
-CHIPSET(0x29A2, i965, "Intel(R) 965G")
-CHIPSET(0x2992, i965, "Intel(R) 965Q")
-CHIPSET(0x2982, i965, "Intel(R) 965G")
-CHIPSET(0x2972, i965, "Intel(R) 946GZ")
-CHIPSET(0x2A02, i965, "Intel(R) 965GM")
-CHIPSET(0x2A12, i965, "Intel(R) 965GME/GLE")
-CHIPSET(0x2A42, g4x, "Mobile IntelĀ® GM45 Express Chipset")
-CHIPSET(0x2E02, g4x, "Intel(R) Integrated Graphics Device")
-CHIPSET(0x2E12, g4x, "Intel(R) Q45/Q43")
-CHIPSET(0x2E22, g4x, "Intel(R) G45/G43")
-CHIPSET(0x2E32, g4x, "Intel(R) G41")
-CHIPSET(0x2E42, g4x, "Intel(R) B43")
-CHIPSET(0x2E92, g4x, "Intel(R) B43")
-CHIPSET(0x0042, ilk, "Intel(R) Ironlake Desktop")
-CHIPSET(0x0046, ilk, "Intel(R) Ironlake Mobile")
-CHIPSET(0x0102, snb_gt1, "Intel(R) Sandybridge Desktop")
-CHIPSET(0x0112, snb_gt2, "Intel(R) Sandybridge Desktop")
-CHIPSET(0x0122, snb_gt2, "Intel(R) Sandybridge Desktop")
-CHIPSET(0x0106, snb_gt1, "Intel(R) Sandybridge Mobile")
-CHIPSET(0x0116, snb_gt2, "Intel(R) Sandybridge Mobile")
-CHIPSET(0x0126, snb_gt2, "Intel(R) Sandybridge Mobile")
-CHIPSET(0x010A, snb_gt1, "Intel(R) Sandybridge Server")
-CHIPSET(0x0152, ivb_gt1, "Intel(R) Ivybridge Desktop")
-CHIPSET(0x0162, ivb_gt2, "Intel(R) Ivybridge Desktop")
-CHIPSET(0x0156, ivb_gt1, "Intel(R) Ivybridge Mobile")
-CHIPSET(0x0166, ivb_gt2, "Intel(R) Ivybridge Mobile")
-CHIPSET(0x015a, ivb_gt1, "Intel(R) Ivybridge Server")
-CHIPSET(0x016a, ivb_gt2, "Intel(R) Ivybridge Server")
-CHIPSET(0x0402, hsw_gt1, "Intel(R) Haswell Desktop")
-CHIPSET(0x0412, hsw_gt2, "Intel(R) Haswell Desktop")
-CHIPSET(0x0422, hsw_gt3, "Intel(R) Haswell Desktop")
-CHIPSET(0x0406, hsw_gt1, "Intel(R) Haswell Mobile")
-CHIPSET(0x0416, hsw_gt2, "Intel(R) Haswell Mobile")
-CHIPSET(0x0426, hsw_gt3, "Intel(R) Haswell Mobile")
-CHIPSET(0x040A, hsw_gt1, "Intel(R) Haswell Server")
-CHIPSET(0x041A, hsw_gt2, "Intel(R) Haswell Server")
-CHIPSET(0x042A, hsw_gt3, "Intel(R) Haswell Server")
-CHIPSET(0x040B, hsw_gt1, "Intel(R) Haswell")
-CHIPSET(0x041B, hsw_gt2, "Intel(R) Haswell")
-CHIPSET(0x042B, hsw_gt3, "Intel(R) Haswell")
-CHIPSET(0x040E, hsw_gt1, "Intel(R) Haswell")
-CHIPSET(0x041E, hsw_gt2, "Intel(R) Haswell")
-CHIPSET(0x042E, hsw_gt3, "Intel(R) Haswell")
-CHIPSET(0x0C02, hsw_gt1, "Intel(R) Haswell Desktop")
-CHIPSET(0x0C12, hsw_gt2, "Intel(R) Haswell Desktop")
-CHIPSET(0x0C22, hsw_gt3, "Intel(R) Haswell Desktop")
-CHIPSET(0x0C06, hsw_gt1, "Intel(R) Haswell Mobile")
-CHIPSET(0x0C16, hsw_gt2, "Intel(R) Haswell Mobile")
-CHIPSET(0x0C26, hsw_gt3, "Intel(R) Haswell Mobile")
-CHIPSET(0x0C0A, hsw_gt1, "Intel(R) Haswell Server")
-CHIPSET(0x0C1A, hsw_gt2, "Intel(R) Haswell Server")
-CHIPSET(0x0C2A, hsw_gt3, "Intel(R) Haswell Server")
-CHIPSET(0x0C0B, hsw_gt1, "Intel(R) Haswell")
-CHIPSET(0x0C1B, hsw_gt2, "Intel(R) Haswell")
-CHIPSET(0x0C2B, hsw_gt3, "Intel(R) Haswell")
-CHIPSET(0x0C0E, hsw_gt1, "Intel(R) Haswell")
-CHIPSET(0x0C1E, hsw_gt2, "Intel(R) Haswell")
-CHIPSET(0x0C2E, hsw_gt3, "Intel(R) Haswell")
-CHIPSET(0x0A02, hsw_gt1, "Intel(R) Haswell Desktop")
-CHIPSET(0x0A12, hsw_gt2, "Intel(R) Haswell Desktop")
-CHIPSET(0x0A22, hsw_gt3, "Intel(R) Haswell Desktop")
-CHIPSET(0x0A06, hsw_gt1, "Intel(R) Haswell Mobile")
-CHIPSET(0x0A16, hsw_gt2, "Intel(R) Haswell Mobile")
-CHIPSET(0x0A26, hsw_gt3, "Intel(R) Haswell Mobile")
-CHIPSET(0x0A0A, hsw_gt1, "Intel(R) Haswell Server")
-CHIPSET(0x0A1A, hsw_gt2, "Intel(R) Haswell Server")
-CHIPSET(0x0A2A, hsw_gt3, "Intel(R) Haswell Server")
-CHIPSET(0x0A0B, hsw_gt1, "Intel(R) Haswell")
-CHIPSET(0x0A1B, hsw_gt2, "Intel(R) Haswell")
-CHIPSET(0x0A2B, hsw_gt3, "Intel(R) Haswell")
-CHIPSET(0x0A0E, hsw_gt1, "Intel(R) Haswell")
-CHIPSET(0x0A1E, hsw_gt2, "Intel(R) Haswell")
-CHIPSET(0x0A2E, hsw_gt3, "Intel(R) Haswell")
-CHIPSET(0x0D02, hsw_gt1, "Intel(R) Haswell Desktop")
-CHIPSET(0x0D12, hsw_gt2, "Intel(R) Haswell Desktop")
-CHIPSET(0x0D22, hsw_gt3, "Intel(R) Haswell Desktop")
-CHIPSET(0x0D06, hsw_gt1, "Intel(R) Haswell Mobile")
-CHIPSET(0x0D16, hsw_gt2, "Intel(R) Haswell Mobile")
-CHIPSET(0x0D26, hsw_gt3, "Intel(R) Haswell Mobile")
-CHIPSET(0x0D0A, hsw_gt1, "Intel(R) Haswell Server")
-CHIPSET(0x0D1A, hsw_gt2, "Intel(R) Haswell Server")
-CHIPSET(0x0D2A, hsw_gt3, "Intel(R) Haswell")
-CHIPSET(0x0D0B, hsw_gt1, "Intel(R) Haswell")
-CHIPSET(0x0D1B, hsw_gt2, "Intel(R) Haswell")
-CHIPSET(0x0D2B, hsw_gt3, "Intel(R) Haswell")
-CHIPSET(0x0D0E, hsw_gt1, "Intel(R) Haswell")
-CHIPSET(0x0D1E, hsw_gt2, "Intel(R) Haswell")
-CHIPSET(0x0D2E, hsw_gt3, "Intel(R) Haswell")
-CHIPSET(0x0F31, byt, "Intel(R) Bay Trail")
-CHIPSET(0x0F32, byt, "Intel(R) Bay Trail")
-CHIPSET(0x0F33, byt, "Intel(R) Bay Trail")
-CHIPSET(0x0157, byt, "Intel(R) Bay Trail")
-CHIPSET(0x0155, byt, "Intel(R) Bay Trail")
-CHIPSET(0x22B0, chv, "Intel(R) HD Graphics (Cherrytrail)")
-CHIPSET(0x22B1, chv, "Intel(R) HD Graphics XXX (Braswell)") /* Overridden in brw_get_renderer_string */
-CHIPSET(0x22B2, chv, "Intel(R) HD Graphics (Cherryview)")
-CHIPSET(0x22B3, chv, "Intel(R) HD Graphics (Cherryview)")
+CHIPSET(0x29A2, i965, "BW", "Intel(R) 965G")
+CHIPSET(0x2992, i965, "BW", "Intel(R) 965Q")
+CHIPSET(0x2982, i965, "BW", "Intel(R) 965G")
+CHIPSET(0x2972, i965, "BW", "Intel(R) 946GZ")
+CHIPSET(0x2A02, i965, "CL", "Intel(R) 965GM")
+CHIPSET(0x2A12, i965, "CL", "Intel(R) 965GME/GLE")
+
+CHIPSET(0x2A42, g4x, "CTG", "Mobile IntelĀ® GM45 Express Chipset")
+CHIPSET(0x2E02, g4x, "ELK", "Intel(R) Integrated Graphics Device")
+CHIPSET(0x2E12, g4x, "ELK", "Intel(R) Q45/Q43")
+CHIPSET(0x2E22, g4x, "ELK", "Intel(R) G45/G43")
+CHIPSET(0x2E32, g4x, "ELK", "Intel(R) G41")
+CHIPSET(0x2E42, g4x, "ELK", "Intel(R) B43")
+CHIPSET(0x2E92, g4x, "ELK", "Intel(R) B43")
+
+CHIPSET(0x0042, ilk, "ILK", "Intel(R) HD Graphics")
+CHIPSET(0x0046, ilk, "ILK", "Intel(R) HD Graphics")
+
+CHIPSET(0x0102, snb_gt1, "SNB GT1", "Intel(R) HD Graphics 2000")
+CHIPSET(0x0112, snb_gt2, "SNB GT2", "Intel(R) HD Graphics 3000")
+CHIPSET(0x0122, snb_gt2, "SNB GT2", "Intel(R) HD Graphics 3000")
+CHIPSET(0x0106, snb_gt1, "SNB GT1", "Intel(R) HD Graphics 2000")
+CHIPSET(0x0116, snb_gt2, "SNB GT2", "Intel(R) HD Graphics 3000")
+CHIPSET(0x0126, snb_gt2, "SNB GT2", "Intel(R) HD Graphics 3000")
+CHIPSET(0x010A, snb_gt1, "SNB GT1", "Intel(R) HD Graphics 2000")
+
+CHIPSET(0x0152, ivb_gt1, "IVB GT1", "Intel(R) HD Graphics 2500")
+CHIPSET(0x0162, ivb_gt2, "IVB GT2", "Intel(R) HD Graphics 4000")
+CHIPSET(0x0156, ivb_gt1, "IVB GT1", "Intel(R) HD Graphics 2500")
+CHIPSET(0x0166, ivb_gt2, "IVB GT2", "Intel(R) HD Graphics 4000")
+CHIPSET(0x015a, ivb_gt1, "IVB GT1", "Intel(R) HD Graphics")
+CHIPSET(0x016a, ivb_gt2, "IVB GT2", "Intel(R) HD Graphics P4000")
+
+CHIPSET(0x0402, hsw_gt1, "HSW GT1", "Intel(R) HD Graphics")
+CHIPSET(0x0412, hsw_gt2, "HSW GT2", "Intel(R) HD Graphics 4600")
+CHIPSET(0x0422, hsw_gt3, "HSW GT3", "Intel(R) HD Graphics")
+CHIPSET(0x0406, hsw_gt1, "HSW GT1", "Intel(R) HD Graphics")
+CHIPSET(0x0416, hsw_gt2, "HSW GT2", "Intel(R) HD Graphics 4600")
+CHIPSET(0x0426, hsw_gt3, "HSW GT3", "Intel(R) HD Graphics")
+CHIPSET(0x040A, hsw_gt1, "HSW GT1", "Intel(R) HD Graphics")
+CHIPSET(0x041A, hsw_gt2, "HSW GT2", "Intel(R) HD Graphics P4600/P4700")
+CHIPSET(0x042A, hsw_gt3, "HSW GT3", "Intel(R) HD Graphics")
+CHIPSET(0x040B, hsw_gt1, "HSW GT1", "Intel(R) HD Graphics")
+CHIPSET(0x041B, hsw_gt2, "HSW GT2", "Intel(R) HD Graphics")
+CHIPSET(0x042B, hsw_gt3, "HSW GT3", "Intel(R) HD Graphics")
+CHIPSET(0x040E, hsw_gt1, "HSW GT1", "Intel(R) HD Graphics")
+CHIPSET(0x041E, hsw_gt2, "HSW GT2", "Intel(R) HD Graphics 4400")
+CHIPSET(0x042E, hsw_gt3, "HSW GT3", "Intel(R) HD Graphics")
+CHIPSET(0x0C02, hsw_gt1, "HSW GT1", "Intel(R) HD Graphics")
+CHIPSET(0x0C12, hsw_gt2, "HSW GT2", "Intel(R) HD Graphics")
+CHIPSET(0x0C22, hsw_gt3, "HSW GT3", "Intel(R) HD Graphics")
+CHIPSET(0x0C06, hsw_gt1, "HSW GT1", "Intel(R) HD Graphics")
+CHIPSET(0x0C16, hsw_gt2, "HSW GT2", "Intel(R) HD Graphics")
+CHIPSET(0x0C26, hsw_gt3, "HSW GT3", "Intel(R) HD Graphics")
+CHIPSET(0x0C0A, hsw_gt1, "HSW GT1", "Intel(R) HD Graphics")
+CHIPSET(0x0C1A, hsw_gt2, "HSW GT2", "Intel(R) HD Graphics")
+CHIPSET(0x0C2A, hsw_gt3, "HSW GT3", "Intel(R) HD Graphics")
+CHIPSET(0x0C0B, hsw_gt1, "HSW GT1", "Intel(R) HD Graphics")
+CHIPSET(0x0C1B, hsw_gt2, "HSW GT2", "Intel(R) HD Graphics")
+CHIPSET(0x0C2B, hsw_gt3, "HSW GT3", "Intel(R) HD Graphics")
+CHIPSET(0x0C0E, hsw_gt1, "HSW GT1", "Intel(R) HD Graphics")
+CHIPSET(0x0C1E, hsw_gt2, "HSW GT2", "Intel(R) HD Graphics")
+CHIPSET(0x0C2E, hsw_gt3, "HSW GT3", "Intel(R) HD Graphics")
+CHIPSET(0x0A02, hsw_gt1, "HSW GT1", "Intel(R) HD Graphics")
+CHIPSET(0x0A12, hsw_gt2, "HSW GT2", "Intel(R) HD Graphics")
+CHIPSET(0x0A22, hsw_gt3, "HSW GT3", "Intel(R) HD Graphics")
+CHIPSET(0x0A06, hsw_gt1, "HSW GT1", "Intel(R) HD Graphics")
+CHIPSET(0x0A16, hsw_gt2, "HSW GT2", "Intel(R) HD Graphics 4400")
+CHIPSET(0x0A26, hsw_gt3, "HSW GT3", "Intel(R) HD Graphics 5000")
+CHIPSET(0x0A0A, hsw_gt1, "HSW GT1", "Intel(R) HD Graphics")
+CHIPSET(0x0A1A, hsw_gt2, "HSW GT2", "Intel(R) HD Graphics")
+CHIPSET(0x0A2A, hsw_gt3, "HSW GT3", "Intel(R) HD Graphics")
+CHIPSET(0x0A0B, hsw_gt1, "HSW GT1", "Intel(R) HD Graphics")
+CHIPSET(0x0A1B, hsw_gt2, "HSW GT2", "Intel(R) HD Graphics")
+CHIPSET(0x0A2B, hsw_gt3, "HSW GT3", "Intel(R) HD Graphics")
+CHIPSET(0x0A0E, hsw_gt1, "HSW GT1", "Intel(R) HD Graphics")
+CHIPSET(0x0A1E, hsw_gt2, "HSW GT2", "Intel(R) HD Graphics 4200")
+CHIPSET(0x0A2E, hsw_gt3, "HSW GT3", "Intel(R) Iris(R) Graphics 5100")
+CHIPSET(0x0D02, hsw_gt1, "HSW GT1", "Intel(R) HD Graphics")
+CHIPSET(0x0D12, hsw_gt2, "HSW GT2", "Intel(R) HD Graphics 4600")
+CHIPSET(0x0D22, hsw_gt3, "HSW GT3", "Intel(R) Iris(R) Pro Graphics 5200")
+CHIPSET(0x0D06, hsw_gt1, "HSW GT1", "Intel(R) HD Graphics")
+CHIPSET(0x0D16, hsw_gt2, "HSW GT2", "Intel(R) HD Graphics")
+CHIPSET(0x0D26, hsw_gt3, "HSW GT3", "Intel(R) Iris(R) Pro Graphics P5200")
+CHIPSET(0x0D0A, hsw_gt1, "HSW GT1", "Intel(R) HD Graphics")
+CHIPSET(0x0D1A, hsw_gt2, "HSW GT2", "Intel(R) HD Graphics")
+CHIPSET(0x0D2A, hsw_gt3, "HSW GT3", "Intel(R) HD Graphics")
+CHIPSET(0x0D0B, hsw_gt1, "HSW GT1", "Intel(R) HD Graphics")
+CHIPSET(0x0D1B, hsw_gt2, "HSW GT2", "Intel(R) HD Graphics")
+CHIPSET(0x0D2B, hsw_gt3, "HSW GT3", "Intel(R) HD Graphics")
+CHIPSET(0x0D0E, hsw_gt1, "HSW GT1", "Intel(R) HD Graphics")
+CHIPSET(0x0D1E, hsw_gt2, "HSW GT2", "Intel(R) HD Graphics")
+CHIPSET(0x0D2E, hsw_gt3, "HSW GT3", "Intel(R) HD Graphics")
+
+CHIPSET(0x0F31, byt, "BYT", "Intel(R) HD Graphics")
+CHIPSET(0x0F32, byt, "BYT", "Intel(R) HD Graphics")
+CHIPSET(0x0F33, byt, "BYT", "Intel(R) HD Graphics")
+CHIPSET(0x0157, byt, "BYT", "Intel(R) HD Graphics")
+CHIPSET(0x0155, byt, "BYT", "Intel(R) HD Graphics")
+
+CHIPSET(0x22B0, chv, "CHV", "Intel(R) HD Graphics")
+CHIPSET(0x22B1, chv, "BSW", "Intel(R) HD Graphics XXX") /* Overridden in brw_get_renderer_string */
+CHIPSET(0x22B2, chv, "CHV", "Intel(R) HD Graphics")
+CHIPSET(0x22B3, chv, "CHV", "Intel(R) HD Graphics")
+
#ifndef PREFER_IRIS
-CHIPSET(0x1602, bdw_gt1, "Intel(R) Broadwell GT1")
-CHIPSET(0x1606, bdw_gt1, "Intel(R) Broadwell GT1")
-CHIPSET(0x160A, bdw_gt1, "Intel(R) Broadwell GT1")
-CHIPSET(0x160B, bdw_gt1, "Intel(R) Broadwell GT1")
-CHIPSET(0x160D, bdw_gt1, "Intel(R) Broadwell GT1")
-CHIPSET(0x160E, bdw_gt1, "Intel(R) Broadwell GT1")
-CHIPSET(0x1612, bdw_gt2, "Intel(R) HD Graphics 5600 (Broadwell GT2)")
-CHIPSET(0x1616, bdw_gt2, "Intel(R) HD Graphics 5500 (Broadwell GT2)")
-CHIPSET(0x161A, bdw_gt2, "Intel(R) Broadwell GT2")
-CHIPSET(0x161B, bdw_gt2, "Intel(R) Broadwell GT2")
-CHIPSET(0x161D, bdw_gt2, "Intel(R) Broadwell GT2")
-CHIPSET(0x161E, bdw_gt2, "Intel(R) HD Graphics 5300 (Broadwell GT2)")
-CHIPSET(0x1622, bdw_gt3, "Intel(R) Iris Pro 6200 (Broadwell GT3e)")
-CHIPSET(0x1626, bdw_gt3, "Intel(R) HD Graphics 6000 (Broadwell GT3)")
-CHIPSET(0x162A, bdw_gt3, "Intel(R) Iris Pro P6300 (Broadwell GT3e)")
-CHIPSET(0x162B, bdw_gt3, "Intel(R) Iris 6100 (Broadwell GT3)")
-CHIPSET(0x162D, bdw_gt3, "Intel(R) Broadwell GT3")
-CHIPSET(0x162E, bdw_gt3, "Intel(R) Broadwell GT3")
-CHIPSET(0x1902, skl_gt1, "Intel(R) HD Graphics 510 (Skylake GT1)")
-CHIPSET(0x1906, skl_gt1, "Intel(R) HD Graphics 510 (Skylake GT1)")
-CHIPSET(0x190A, skl_gt1, "Intel(R) Skylake GT1")
-CHIPSET(0x190B, skl_gt1, "Intel(R) HD Graphics 510 (Skylake GT1)")
-CHIPSET(0x190E, skl_gt1, "Intel(R) Skylake GT1")
-CHIPSET(0x1912, skl_gt2, "Intel(R) HD Graphics 530 (Skylake GT2)")
-CHIPSET(0x1913, skl_gt2, "Intel(R) Skylake GT2f")
-CHIPSET(0x1915, skl_gt2, "Intel(R) Skylake GT2f")
-CHIPSET(0x1916, skl_gt2, "Intel(R) HD Graphics 520 (Skylake GT2)")
-CHIPSET(0x1917, skl_gt2, "Intel(R) Skylake GT2f")
-CHIPSET(0x191A, skl_gt2, "Intel(R) Skylake GT2")
-CHIPSET(0x191B, skl_gt2, "Intel(R) HD Graphics 530 (Skylake GT2)")
-CHIPSET(0x191D, skl_gt2, "Intel(R) HD Graphics P530 (Skylake GT2)")
-CHIPSET(0x191E, skl_gt2, "Intel(R) HD Graphics 515 (Skylake GT2)")
-CHIPSET(0x1921, skl_gt2, "Intel(R) HD Graphics 520 (Skylake GT2)")
-CHIPSET(0x1923, skl_gt3, "Intel(R) Skylake GT3e")
-CHIPSET(0x1926, skl_gt3, "Intel(R) Iris Graphics 540 (Skylake GT3e)")
-CHIPSET(0x1927, skl_gt3, "Intel(R) Iris Graphics 550 (Skylake GT3e)")
-CHIPSET(0x192A, skl_gt4, "Intel(R) Skylake GT4")
-CHIPSET(0x192B, skl_gt3, "Intel(R) Iris Graphics 555 (Skylake GT3e)")
-CHIPSET(0x192D, skl_gt3, "Intel(R) Iris Graphics P555 (Skylake GT3e)")
-CHIPSET(0x1932, skl_gt4, "Intel(R) Iris Pro Graphics 580 (Skylake GT4e)")
-CHIPSET(0x193A, skl_gt4, "Intel(R) Iris Pro Graphics P580 (Skylake GT4e)")
-CHIPSET(0x193B, skl_gt4, "Intel(R) Iris Pro Graphics 580 (Skylake GT4e)")
-CHIPSET(0x193D, skl_gt4, "Intel(R) Iris Pro Graphics P580 (Skylake GT4e)")
-CHIPSET(0x0A84, bxt, "Intel(R) HD Graphics (Broxton)")
-CHIPSET(0x1A84, bxt, "Intel(R) HD Graphics (Broxton)")
-CHIPSET(0x1A85, bxt_2x6, "Intel(R) HD Graphics (Broxton 2x6)")
-CHIPSET(0x5A84, bxt, "Intel(R) HD Graphics 505 (Broxton)")
-CHIPSET(0x5A85, bxt_2x6, "Intel(R) HD Graphics 500 (Broxton 2x6)")
-CHIPSET(0x5902, kbl_gt1, "Intel(R) HD Graphics 610 (Kaby Lake GT1)")
-CHIPSET(0x5906, kbl_gt1, "Intel(R) HD Graphics 610 (Kaby Lake GT1)")
-CHIPSET(0x590A, kbl_gt1, "Intel(R) Kabylake GT1")
-CHIPSET(0x5908, kbl_gt1, "Intel(R) Kabylake GT1")
-CHIPSET(0x590B, kbl_gt1, "Intel(R) Kabylake GT1")
-CHIPSET(0x590E, kbl_gt1, "Intel(R) Kabylake GT1")
-CHIPSET(0x5913, kbl_gt1_5, "Intel(R) Kabylake GT1.5")
-CHIPSET(0x5915, kbl_gt1_5, "Intel(R) Kabylake GT1.5")
-CHIPSET(0x5917, kbl_gt2, "Intel(R) UHD Graphics 620 (Kabylake GT2)")
-CHIPSET(0x5912, kbl_gt2, "Intel(R) HD Graphics 630 (Kaby Lake GT2)")
-CHIPSET(0x5916, kbl_gt2, "Intel(R) HD Graphics 620 (Kaby Lake GT2)")
-CHIPSET(0x591A, kbl_gt2, "Intel(R) HD Graphics P630 (Kaby Lake GT2)")
-CHIPSET(0x591B, kbl_gt2, "Intel(R) HD Graphics 630 (Kaby Lake GT2)")
-CHIPSET(0x591D, kbl_gt2, "Intel(R) HD Graphics P630 (Kaby Lake GT2)")
-CHIPSET(0x591E, kbl_gt2, "Intel(R) HD Graphics 615 (Kaby Lake GT2)")
-CHIPSET(0x5921, kbl_gt2, "Intel(R) Kabylake GT2F")
-CHIPSET(0x5923, kbl_gt3, "Intel(R) Kabylake GT3")
-CHIPSET(0x5926, kbl_gt3, "Intel(R) Iris Plus Graphics 640 (Kaby Lake GT3e)")
-CHIPSET(0x5927, kbl_gt3, "Intel(R) Iris Plus Graphics 650 (Kaby Lake GT3e)")
-CHIPSET(0x593B, kbl_gt4, "Intel(R) Kabylake GT4")
-CHIPSET(0x591C, kbl_gt2, "Intel(R) Amber Lake (Kabylake) GT2")
-CHIPSET(0x87C0, kbl_gt2, "Intel(R) Amber Lake (Kabylake) GT2")
-CHIPSET(0x87CA, cfl_gt2, "Intel(R) Amber Lake (Coffeelake) GT2")
-CHIPSET(0x3184, glk, "Intel(R) UHD Graphics 605 (Geminilake)")
-CHIPSET(0x3185, glk_2x6, "Intel(R) UHD Graphics 600 (Geminilake 2x6)")
-CHIPSET(0x3E90, cfl_gt1, "Intel(R) UHD Graphics 610 (Coffeelake 2x6 GT1)")
-CHIPSET(0x3E93, cfl_gt1, "Intel(R) UHD Graphics 610 (Coffeelake 2x6 GT1)")
-CHIPSET(0x3E99, cfl_gt1, "Intel(R) HD Graphics (Coffeelake 2x6 GT1)")
-CHIPSET(0x3E9C, cfl_gt1, "Intel(R) HD Graphics (Coffeelake 2x6 GT1)")
-CHIPSET(0x3E91, cfl_gt2, "Intel(R) UHD Graphics 630 (Coffeelake 3x8 GT2)")
-CHIPSET(0x3E92, cfl_gt2, "Intel(R) UHD Graphics 630 (Coffeelake 3x8 GT2)")
-CHIPSET(0x3E96, cfl_gt2, "Intel(R) HD Graphics (Coffeelake 3x8 GT2)")
-CHIPSET(0x3E98, cfl_gt2, "Intel(R) UHD Graphics 630 (Coffeelake 3x8 GT2)")
-CHIPSET(0x3E9A, cfl_gt2, "Intel(R) HD Graphics (Coffeelake 3x8 GT2)")
-CHIPSET(0x3E9B, cfl_gt2, "Intel(R) UHD Graphics 630 (Coffeelake 3x8 GT2)")
-CHIPSET(0x3E94, cfl_gt2, "Intel(R) HD Graphics (Coffeelake 3x8 GT2)")
-CHIPSET(0x3EA9, cfl_gt2, "Intel(R) HD Graphics (Coffeelake 3x8 GT2)")
-CHIPSET(0x3EA5, cfl_gt3, "Intel(R) HD Graphics (Coffeelake 3x8 GT3)")
-CHIPSET(0x3EA6, cfl_gt3, "Intel(R) HD Graphics (Coffeelake 3x8 GT3)")
-CHIPSET(0x3EA7, cfl_gt3, "Intel(R) HD Graphics (Coffeelake 3x8 GT3)")
-CHIPSET(0x3EA8, cfl_gt3, "Intel(R) HD Graphics (Coffeelake 3x8 GT3)")
-CHIPSET(0x3EA1, cfl_gt1, "Intel(R) UHD Graphics (Whiskey Lake 2x6 GT1)")
-CHIPSET(0x3EA4, cfl_gt1, "Intel(R) UHD Graphics (Whiskey Lake 3x8 GT1)")
-CHIPSET(0x3EA0, cfl_gt2, "Intel(R) UHD Graphics (Whiskey Lake 3x8 GT2)")
-CHIPSET(0x3EA3, cfl_gt2, "Intel(R) UHD Graphics (Whiskey Lake 3x8 GT2)")
-CHIPSET(0x3EA2, cfl_gt3, "Intel(R) UHD Graphics (Whiskey Lake 3x8 GT3)")
-CHIPSET(0x9B21, cfl_gt1, "Intel(R) UHD Graphics (Comet Lake 2x6 GT1)")
-CHIPSET(0x9BA0, cfl_gt1, "Intel(R) UHD Graphics (Comet Lake 2x6 GT1)")
-CHIPSET(0x9BA2, cfl_gt1, "Intel(R) UHD Graphics (Comet Lake 2x6 GT1)")
-CHIPSET(0x9BA4, cfl_gt1, "Intel(R) UHD Graphics (Comet Lake 2x6 GT1)")
-CHIPSET(0x9BA5, cfl_gt1, "Intel(R) UHD Graphics (Comet Lake 2x6 GT1)")
-CHIPSET(0x9BA8, cfl_gt1, "Intel(R) UHD Graphics (Comet Lake 2x6 GT1)")
-CHIPSET(0x9BAA, cfl_gt1, "Intel(R) UHD Graphics (Comet Lake 2x6 GT1)")
-CHIPSET(0x9BAB, cfl_gt1, "Intel(R) UHD Graphics (Comet Lake 2x6 GT1)")
-CHIPSET(0x9BAC, cfl_gt1, "Intel(R) UHD Graphics (Comet Lake 2x6 GT1)")
-CHIPSET(0x9B41, cfl_gt2, "Intel(R) UHD Graphics (Comet Lake 3x8 GT2)")
-CHIPSET(0x9BC0, cfl_gt2, "Intel(R) UHD Graphics (Comet Lake 3x8 GT2)")
-CHIPSET(0x9BC2, cfl_gt2, "Intel(R) UHD Graphics (Comet Lake 3x8 GT2)")
-CHIPSET(0x9BC4, cfl_gt2, "Intel(R) UHD Graphics (Comet Lake 3x8 GT2)")
-CHIPSET(0x9BC5, cfl_gt2, "Intel(R) UHD Graphics (Comet Lake 3x8 GT2)")
-CHIPSET(0x9BC6, cfl_gt2, "Intel(R) UHD Graphics (Comet Lake 3x8 GT2)")
-CHIPSET(0x9BC8, cfl_gt2, "Intel(R) UHD Graphics (Comet Lake 3x8 GT2)")
-CHIPSET(0x9BCA, cfl_gt2, "Intel(R) UHD Graphics (Comet Lake 3x8 GT2)")
-CHIPSET(0x9BCB, cfl_gt2, "Intel(R) UHD Graphics (Comet Lake 3x8 GT2)")
-CHIPSET(0x9BCC, cfl_gt2, "Intel(R) UHD Graphics (Comet Lake 3x8 GT2)")
-CHIPSET(0x9BE6, cfl_gt2, "Intel(R) UHD Graphics (Comet Lake 3x8 GT2)")
-CHIPSET(0x9BF6, cfl_gt2, "Intel(R) UHD Graphics (Comet Lake 3x8 GT2)")
-CHIPSET(0x5A49, cnl_2x8, "Intel(R) HD Graphics (Cannonlake 2x8 GT0.5)")
-CHIPSET(0x5A4A, cnl_2x8, "Intel(R) HD Graphics (Cannonlake 2x8 GT0.5)")
-CHIPSET(0x5A41, cnl_3x8, "Intel(R) HD Graphics (Cannonlake 3x8 GT1)")
-CHIPSET(0x5A42, cnl_3x8, "Intel(R) HD Graphics (Cannonlake 3x8 GT1)")
-CHIPSET(0x5A44, cnl_3x8, "Intel(R) HD Graphics (Cannonlake 3x8 GT1)")
-CHIPSET(0x5A59, cnl_4x8, "Intel(R) HD Graphics (Cannonlake 4x8 GT1.5)")
-CHIPSET(0x5A5A, cnl_4x8, "Intel(R) HD Graphics (Cannonlake 4x8 GT1.5)")
-CHIPSET(0x5A5C, cnl_4x8, "Intel(R) HD Graphics (Cannonlake 4x8 GT1.5)")
-CHIPSET(0x5A50, cnl_5x8, "Intel(R) HD Graphics (Cannonlake 5x8 GT2)")
-CHIPSET(0x5A51, cnl_5x8, "Intel(R) HD Graphics (Cannonlake 5x8 GT2)")
-CHIPSET(0x5A52, cnl_5x8, "Intel(R) HD Graphics (Cannonlake 5x8 GT2)")
-CHIPSET(0x5A54, cnl_5x8, "Intel(R) HD Graphics (Cannonlake 5x8 GT2)")
-CHIPSET(0x8A50, icl_8x8, "Intel(R) HD Graphics (Ice Lake 8x8 GT2)")
-CHIPSET(0x8A51, icl_8x8, "Intel(R) Iris(R) Plus Graphics (Ice Lake 8x8 GT2)")
-CHIPSET(0x8A52, icl_8x8, "Intel(R) Iris(R) Plus Graphics (Ice Lake 8x8 GT2)")
-CHIPSET(0x8A53, icl_8x8, "Intel(R) Iris(R) Plus Graphics (Ice Lake 8x8 GT2)")
-CHIPSET(0x8A54, icl_6x8, "Intel(R) Iris(R) Plus Graphics (Ice Lake 6x8 GT1.5)")
-CHIPSET(0x8A56, icl_4x8, "Intel(R) UHD Graphics (Ice Lake 4x8 GT1)")
-CHIPSET(0x8A57, icl_6x8, "Intel(R) HD Graphics (Ice Lake 6x8 GT1.5)")
-CHIPSET(0x8A58, icl_4x8, "Intel(R) UHD Graphics (Ice Lake 4x8 GT1)")
-CHIPSET(0x8A59, icl_6x8, "Intel(R) HD Graphics (Ice Lake 6x8 GT1.5)")
-CHIPSET(0x8A5A, icl_6x8, "Intel(R) Iris(R) Plus Graphics (Ice Lake 6x8 GT1.5)")
-CHIPSET(0x8A5B, icl_4x8, "Intel(R) HD Graphics (Ice Lake 4x8 GT1)")
-CHIPSET(0x8A5C, icl_6x8, "Intel(R) Iris(R) Plus Graphics (Ice Lake 6x8 GT1.5)")
-CHIPSET(0x8A5D, icl_4x8, "Intel(R) HD Graphics (Ice Lake 4x8 GT1)")
-CHIPSET(0x8A71, icl_1x8, "Intel(R) HD Graphics (Ice Lake 1x8 GT0.5)")
-CHIPSET(0x4500, ehl_4x8, "Intel(R) HD Graphics (Elkhart Lake 4x8)")
-CHIPSET(0x4571, ehl_4x8, "Intel(R) HD Graphics (Elkhart Lake 4x8)")
-CHIPSET(0x4551, ehl_4x4, "Intel(R) HD Graphics (Elkhart Lake 4x4)")
-CHIPSET(0x4541, ehl_2x4, "Intel(R) HD Graphics (Elkhart Lake 2x4)")
-CHIPSET(0x4E51, ehl_4x4, "Intel(R) HD Graphics (Jasper Lake 4x4)")
-CHIPSET(0x4E61, ehl_4x6, "Intel(R) HD Graphics (Jasper Lake 4x6)")
-CHIPSET(0x4E71, ehl_4x8, "Intel(R) HD Graphics (Jasper Lake 4x8)")
+CHIPSET(0x1602, bdw_gt1, "BDW GT1", "Intel(R) HD Graphics")
+CHIPSET(0x1606, bdw_gt1, "BDW GT1", "Intel(R) HD Graphics")
+CHIPSET(0x160A, bdw_gt1, "BDW GT1", "Intel(R) HD Graphics")
+CHIPSET(0x160B, bdw_gt1, "BDW GT1", "Intel(R) HD Graphics")
+CHIPSET(0x160D, bdw_gt1, "BDW GT1", "Intel(R) HD Graphics")
+CHIPSET(0x160E, bdw_gt1, "BDW GT1", "Intel(R) HD Graphics")
+CHIPSET(0x1612, bdw_gt2, "BDW GT2", "Intel(R) HD Graphics 5600")
+CHIPSET(0x1616, bdw_gt2, "BDW GT2", "Intel(R) HD Graphics 5500")
+CHIPSET(0x161A, bdw_gt2, "BDW GT2", "Intel(R) HD Graphics P5700")
+CHIPSET(0x161B, bdw_gt2, "BDW GT2", "Intel(R) HD Graphics")
+CHIPSET(0x161D, bdw_gt2, "BDW GT2", "Intel(R) HD Graphics")
+CHIPSET(0x161E, bdw_gt2, "BDW GT2", "Intel(R) HD Graphics 5300")
+CHIPSET(0x1622, bdw_gt3, "BDW GT3", "Intel(R) Iris(R) Pro Graphics 6200")
+CHIPSET(0x1626, bdw_gt3, "BDW GT3", "Intel(R) HD Graphics 6000")
+CHIPSET(0x162A, bdw_gt3, "BDW GT3", "Intel(R) Iris(R) Pro Graphics P6300")
+CHIPSET(0x162B, bdw_gt3, "BDW GT3", "Intel(R) Iris(R) Graphics 6100")
+CHIPSET(0x162D, bdw_gt3, "BDW GT3", "Intel(R) HD Graphics")
+CHIPSET(0x162E, bdw_gt3, "BDW GT3", "Intel(R) HD Graphics")
+
+CHIPSET(0x1902, skl_gt1, "SKL GT1", "Intel(R) HD Graphics 510")
+CHIPSET(0x1906, skl_gt1, "SKL GT1", "Intel(R) HD Graphics 510")
+CHIPSET(0x190A, skl_gt1, "SKL GT1", "Intel(R) HD Graphics")
+CHIPSET(0x190B, skl_gt1, "SKL GT1", "Intel(R) HD Graphics 510")
+CHIPSET(0x190E, skl_gt1, "SKL GT1", "Intel(R) HD Graphics")
+CHIPSET(0x1912, skl_gt2, "SKL GT2", "Intel(R) HD Graphics 530")
+CHIPSET(0x1913, skl_gt2, "SKL GT2F", "Intel(R) HD Graphics")
+CHIPSET(0x1915, skl_gt2, "SKL GT2F", "Intel(R) HD Graphics")
+CHIPSET(0x1916, skl_gt2, "SKL GT2", "Intel(R) HD Graphics 520")
+CHIPSET(0x1917, skl_gt2, "SKL GT2F", "Intel(R) HD Graphics")
+CHIPSET(0x191A, skl_gt2, "SKL GT2", "Intel(R) HD Graphics")
+CHIPSET(0x191B, skl_gt2, "SKL GT2", "Intel(R) HD Graphics 530")
+CHIPSET(0x191D, skl_gt2, "SKL GT2", "Intel(R) HD Graphics P530")
+CHIPSET(0x191E, skl_gt2, "SKL GT2", "Intel(R) HD Graphics 515")
+CHIPSET(0x1921, skl_gt2, "SKL GT2", "Intel(R) HD Graphics 520")
+CHIPSET(0x1923, skl_gt3, "SKL GT3", "Intel(R) HD Graphics 535")
+CHIPSET(0x1926, skl_gt3, "SKL GT3", "Intel(R) Iris(R) Graphics 540")
+CHIPSET(0x1927, skl_gt3, "SKL GT3", "Intel(R) Iris(R) Graphics 550")
+CHIPSET(0x192A, skl_gt4, "SKL GT4", "Intel(R) HD Graphics")
+CHIPSET(0x192B, skl_gt3, "SKL GT3", "Intel(R) Iris(R) Graphics 555")
+CHIPSET(0x192D, skl_gt3, "SKL GT3", "Intel(R) Iris(R) Graphics P555")
+CHIPSET(0x1932, skl_gt4, "SKL GT4", "Intel(R) Iris(R) Pro Graphics 580")
+CHIPSET(0x193A, skl_gt4, "SKL GT4", "Intel(R) Iris(R) Pro Graphics P580")
+CHIPSET(0x193B, skl_gt4, "SKL GT4", "Intel(R) Iris(R) Pro Graphics 580")
+CHIPSET(0x193D, skl_gt4, "SKL GT4", "Intel(R) Iris(R) Pro Graphics P580")
+
+CHIPSET(0x0A84, bxt, "BXT 3", "Intel(R) HD Graphics")
+CHIPSET(0x1A84, bxt, "BXT 3", "Intel(R) HD Graphics")
+CHIPSET(0x1A85, bxt_2x6, "BXT 2", "Intel(R) HD Graphics")
+CHIPSET(0x5A84, bxt, "APL 3", "Intel(R) HD Graphics 505")
+CHIPSET(0x5A85, bxt_2x6, "APL 2", "Intel(R) HD Graphics 500")
+
+CHIPSET(0x3184, glk, "GLK 3", "Intel(R) UHD Graphics 605")
+CHIPSET(0x3185, glk_2x6, "GLK 2", "Intel(R) UHD Graphics 600")
+
+CHIPSET(0x5902, kbl_gt1, "KBL GT1", "Intel(R) HD Graphics 610")
+CHIPSET(0x5906, kbl_gt1, "KBL GT1", "Intel(R) HD Graphics 610")
+CHIPSET(0x590A, kbl_gt1, "KBL GT1", "Intel(R) HD Graphics")
+CHIPSET(0x5908, kbl_gt1, "KBL GT1", "Intel(R) HD Graphics")
+CHIPSET(0x590B, kbl_gt1, "KBL GT1", "Intel(R) HD Graphics 610")
+CHIPSET(0x590E, kbl_gt1, "KBL GT1", "Intel(R) HD Graphics")
+CHIPSET(0x5913, kbl_gt1_5, "KBL GT1.5", "Intel(R) HD Graphics")
+CHIPSET(0x5915, kbl_gt1_5, "KBL GT1.5", "Intel(R) HD Graphics")
+CHIPSET(0x5917, kbl_gt2, "KBL GT2", "Intel(R) UHD Graphics 620")
+CHIPSET(0x5912, kbl_gt2, "KBL GT2", "Intel(R) HD Graphics 630")
+CHIPSET(0x5916, kbl_gt2, "KBL GT2", "Intel(R) HD Graphics 620")
+CHIPSET(0x591A, kbl_gt2, "KBL GT2", "Intel(R) HD Graphics P630")
+CHIPSET(0x591B, kbl_gt2, "KBL GT2", "Intel(R) HD Graphics 630")
+CHIPSET(0x591D, kbl_gt2, "KBL GT2", "Intel(R) HD Graphics P630")
+CHIPSET(0x591E, kbl_gt2, "KBL GT2", "Intel(R) HD Graphics 615")
+CHIPSET(0x5921, kbl_gt2, "KBL GT2F", "Intel(R) HD Graphics 620")
+CHIPSET(0x5923, kbl_gt3, "KBL GT3", "Intel(R) HD Graphics 635")
+CHIPSET(0x5926, kbl_gt3, "KBL GT3", "Intel(R) Iris(R) Plus Graphics 640 (Kaby Lake GT3e)")
+CHIPSET(0x5927, kbl_gt3, "KBL GT3", "Intel(R) Iris(R) Plus Graphics 650 (Kaby Lake GT3e)")
+CHIPSET(0x593B, kbl_gt4, "KBL GT4", "Intel(R) HD Graphics")
+
+CHIPSET(0x591C, kbl_gt2, "AML-KBL", "Intel(R) UHD Graphics 615")
+CHIPSET(0x87C0, kbl_gt2, "AML-KBL", "Intel(R) UHD Graphics 617")
+
+CHIPSET(0x87CA, cfl_gt2, "AML-CFL", "Intel(R) UHD Graphics")
+
+CHIPSET(0x3E90, cfl_gt1, "CFL GT1", "Intel(R) UHD Graphics 610")
+CHIPSET(0x3E93, cfl_gt1, "CFL GT1", "Intel(R) UHD Graphics 610")
+CHIPSET(0x3E99, cfl_gt1, "CFL GT1", "Intel(R) UHD Graphics 610")
+CHIPSET(0x3E9C, cfl_gt1, "CFL GT1", "Intel(R) UHD Graphics 610")
+CHIPSET(0x3E91, cfl_gt2, "CFL GT2", "Intel(R) UHD Graphics 630")
+CHIPSET(0x3E92, cfl_gt2, "CFL GT2", "Intel(R) UHD Graphics 630")
+CHIPSET(0x3E96, cfl_gt2, "CFL GT2", "Intel(R) UHD Graphics P630")
+CHIPSET(0x3E98, cfl_gt2, "CFL GT2", "Intel(R) UHD Graphics 630")
+CHIPSET(0x3E9A, cfl_gt2, "CFL GT2", "Intel(R) UHD Graphics P630")
+CHIPSET(0x3E9B, cfl_gt2, "CFL GT2", "Intel(R) UHD Graphics 630")
+CHIPSET(0x3E94, cfl_gt2, "CFL GT2", "Intel(R) UHD Graphics P630")
+CHIPSET(0x3EA9, cfl_gt2, "CFL GT2", "Intel(R) UHD Graphics 620")
+CHIPSET(0x3EA5, cfl_gt3, "CFL GT3", "Intel(R) Iris(R) Plus Graphics 655")
+CHIPSET(0x3EA6, cfl_gt3, "CFL GT3", "Intel(R) Iris(R) Plus Graphics 645")
+CHIPSET(0x3EA7, cfl_gt3, "CFL GT3", "Intel(R) HD Graphics")
+CHIPSET(0x3EA8, cfl_gt3, "CFL GT3", "Intel(R) Iris(R) Plus Graphics 655")
+
+CHIPSET(0x3EA1, cfl_gt1, "WHL GT1", "Intel(R) UHD Graphics 610")
+CHIPSET(0x3EA4, cfl_gt1, "WHL GT1", "Intel(R) UHD Graphics")
+CHIPSET(0x3EA0, cfl_gt2, "WHL GT2", "Intel(R) UHD Graphics 620")
+CHIPSET(0x3EA3, cfl_gt2, "WHL GT2", "Intel(R) UHD Graphics")
+CHIPSET(0x3EA2, cfl_gt3, "WHL GT3", "Intel(R) UHD Graphics")
+
+CHIPSET(0x9B21, cfl_gt1, "CML GT1", "Intel(R) UHD Graphics")
+CHIPSET(0x9BA0, cfl_gt1, "CML GT1", "Intel(R) UHD Graphics")
+CHIPSET(0x9BA2, cfl_gt1, "CML GT1", "Intel(R) UHD Graphics")
+CHIPSET(0x9BA4, cfl_gt1, "CML GT1", "Intel(R) UHD Graphics")
+CHIPSET(0x9BA5, cfl_gt1, "CML GT1", "Intel(R) UHD Graphics 610")
+CHIPSET(0x9BA8, cfl_gt1, "CML GT1", "Intel(R) UHD Graphics 610")
+CHIPSET(0x9BAA, cfl_gt1, "CML GT1", "Intel(R) UHD Graphics")
+CHIPSET(0x9BAB, cfl_gt1, "CML GT1", "Intel(R) UHD Graphics")
+CHIPSET(0x9BAC, cfl_gt1, "CML GT1", "Intel(R) UHD Graphics")
+CHIPSET(0x9B41, cfl_gt2, "CML GT2", "Intel(R) UHD Graphics")
+CHIPSET(0x9BC0, cfl_gt2, "CML GT2", "Intel(R) UHD Graphics")
+CHIPSET(0x9BC2, cfl_gt2, "CML GT2", "Intel(R) UHD Graphics")
+CHIPSET(0x9BC4, cfl_gt2, "CML GT2", "Intel(R) UHD Graphics")
+CHIPSET(0x9BC5, cfl_gt2, "CML GT2", "Intel(R) UHD Graphics 630")
+CHIPSET(0x9BC6, cfl_gt2, "CML GT2", "Intel(R) UHD Graphics P630")
+CHIPSET(0x9BC8, cfl_gt2, "CML GT2", "Intel(R) UHD Graphics 630")
+CHIPSET(0x9BCA, cfl_gt2, "CML GT2", "Intel(R) UHD Graphics")
+CHIPSET(0x9BCB, cfl_gt2, "CML GT2", "Intel(R) UHD Graphics")
+CHIPSET(0x9BCC, cfl_gt2, "CML GT2", "Intel(R) UHD Graphics")
+CHIPSET(0x9BE6, cfl_gt2, "CML GT2", "Intel(R) UHD Graphics P630")
+CHIPSET(0x9BF6, cfl_gt2, "CML GT2", "Intel(R) UHD Graphics P630")
+
+CHIPSET(0x5A49, cnl_gt0_5, "CNL GT0.5", "Intel(R) HD Graphics")
+CHIPSET(0x5A4A, cnl_gt0_5, "CNL GT0.5", "Intel(R) HD Graphics")
+CHIPSET(0x5A41, cnl_gt1, "CNL GT1", "Intel(R) HD Graphics")
+CHIPSET(0x5A42, cnl_gt1, "CNL GT1", "Intel(R) HD Graphics")
+CHIPSET(0x5A44, cnl_gt1, "CNL GT1", "Intel(R) HD Graphics")
+CHIPSET(0x5A59, cnl_gt1_5, "CNL GT1.5", "Intel(R) HD Graphics")
+CHIPSET(0x5A5A, cnl_gt1_5, "CNL GT1.5", "Intel(R) HD Graphics")
+CHIPSET(0x5A5C, cnl_gt1_5, "CNL GT1.5", "Intel(R) HD Graphics")
+CHIPSET(0x5A50, cnl_gt2, "CNL GT2", "Intel(R) HD Graphics")
+CHIPSET(0x5A51, cnl_gt2, "CNL GT2", "Intel(R) HD Graphics")
+CHIPSET(0x5A52, cnl_gt2, "CNL GT2", "Intel(R) HD Graphics")
+CHIPSET(0x5A54, cnl_gt2, "CNL GT2", "Intel(R) HD Graphics")
+
+CHIPSET(0x8A50, icl_gt2, "ICL GT2", "Intel(R) HD Graphics")
+CHIPSET(0x8A51, icl_gt2, "ICL GT2", "Intel(R) Iris(R) Plus Graphics")
+CHIPSET(0x8A52, icl_gt2, "ICL GT2", "Intel(R) Iris(R) Plus Graphics")
+CHIPSET(0x8A53, icl_gt2, "ICL GT2", "Intel(R) Iris(R) Plus Graphics")
+CHIPSET(0x8A54, icl_gt1_5, "ICL GT1.5", "Intel(R) Iris(R) Plus Graphics")
+CHIPSET(0x8A56, icl_gt1, "ICL GT1", "Intel(R) UHD Graphics")
+CHIPSET(0x8A57, icl_gt1_5, "ICL GT1.5", "Intel(R) HD Graphics")
+CHIPSET(0x8A58, icl_gt1, "ICL GT1", "Intel(R) UHD Graphics")
+CHIPSET(0x8A59, icl_gt1_5, "ICL GT1.5", "Intel(R) HD Graphics")
+CHIPSET(0x8A5A, icl_gt1_5, "ICL GT1.5", "Intel(R) Iris(R) Plus Graphics")
+CHIPSET(0x8A5B, icl_gt1, "ICL GT1", "Intel(R) HD Graphics")
+CHIPSET(0x8A5C, icl_gt1_5, "ICL GT1.5", "Intel(R) Iris(R) Plus Graphics")
+CHIPSET(0x8A5D, icl_gt1, "ICL GT1", "Intel(R) HD Graphics")
+CHIPSET(0x8A71, icl_gt0_5, "ICL GT0.5", "Intel(R) HD Graphics")
+
+CHIPSET(0x4500, ehl_7, "EHL", "Intel(R) UHD Graphics")
+CHIPSET(0x4571, ehl_7, "EHL", "Intel(R) UHD Graphics")
+CHIPSET(0x4551, ehl_5, "EHL", "Intel(R) UHD Graphics")
+CHIPSET(0x4541, ehl_4, "EHL", "Intel(R) UHD Graphics")
+CHIPSET(0x4E51, ehl_5, "JSL", "Intel(R) UHD Graphics")
+CHIPSET(0x4E61, ehl_6, "JSL", "Intel(R) UHD Graphics")
+CHIPSET(0x4E71, ehl_7, "JSL", "Intel(R) UHD Graphics")
#endif
diff --git a/include/pci_ids/iris_pci_ids.h b/include/pci_ids/iris_pci_ids.h
index 76d7d910920..b58360a1916 100644
--- a/include/pci_ids/iris_pci_ids.h
+++ b/include/pci_ids/iris_pci_ids.h
@@ -1,6 +1,6 @@
-CHIPSET(0x9A40, tgl_1x6x16, "Intel(R) Graphics (TGL GT2)")
-CHIPSET(0x9A49, tgl_1x6x16, "Intel(R) Graphics (TGL GT2)")
-CHIPSET(0x9A59, tgl_1x6x16, "Intel(R) Graphics (TGL GT2)")
-CHIPSET(0x9A60, tgl_1x2x16, "Intel(R) Graphics (TGL GT1)")
-CHIPSET(0x9A68, tgl_1x2x16, "Intel(R) Graphics (TGL GT1)")
-CHIPSET(0x9A70, tgl_1x2x16, "Intel(R) Graphics (TGL GT1)")
+CHIPSET(0x9A40, tgl_gt2, "TGL GT2", "Intel(R) Graphics")
+CHIPSET(0x9A49, tgl_gt2, "TGL GT2", "Intel(R) Graphics")
+CHIPSET(0x9A59, tgl_gt2, "TGL GT2", "Intel(R) Graphics")
+CHIPSET(0x9A60, tgl_gt1, "TGL GT1", "Intel(R) Graphics")
+CHIPSET(0x9A68, tgl_gt1, "TGL GT1", "Intel(R) Graphics")
+CHIPSET(0x9A70, tgl_gt1, "TGL GT1", "Intel(R) Graphics")
diff --git a/src/intel/dev/gen_device_info.c b/src/intel/dev/gen_device_info.c
index 520b87073a7..2b43ce0010b 100644
--- a/src/intel/dev/gen_device_info.c
+++ b/src/intel/dev/gen_device_info.c
@@ -854,28 +854,28 @@ static const struct gen_device_info gen_device_info_cfl_gt3 = {
.num_eu_per_subslice = 8, \
.l3_banks = _l3
-static const struct gen_device_info gen_device_info_cnl_2x8 = {
+static const struct gen_device_info gen_device_info_cnl_gt0_5 = {
/* GT0.5 */
GEN10_FEATURES(1, 1, subslices(2), 2),
.is_cannonlake = true,
.simulator_id = 15,
};
-static const struct gen_device_info gen_device_info_cnl_3x8 = {
+static const struct gen_device_info gen_device_info_cnl_gt1 = {
/* GT1 */
GEN10_FEATURES(1, 1, subslices(3), 3),
.is_cannonlake = true,
.simulator_id = 15,
};
-static const struct gen_device_info gen_device_info_cnl_4x8 = {
+static const struct gen_device_info gen_device_info_cnl_gt1_5 = {
/* GT 1.5 */
GEN10_FEATURES(1, 2, subslices(2, 2), 6),
.is_cannonlake = true,
.simulator_id = 15,
};
-static const struct gen_device_info gen_device_info_cnl_5x8 = {
+static const struct gen_device_info gen_device_info_cnl_gt2 = {
/* GT2 */
GEN10_FEATURES(2, 2, subslices(3, 2), 6),
.is_cannonlake = true,
@@ -913,7 +913,7 @@ static const struct gen_device_info gen_device_info_cnl_5x8 = {
[MESA_SHADER_GEOMETRY] = 1032, \
}
-static const struct gen_device_info gen_device_info_icl_8x8 = {
+static const struct gen_device_info gen_device_info_icl_gt2 = {
GEN11_FEATURES(2, 1, subslices(8), 8),
.urb = {
.size = 1024,
@@ -922,7 +922,7 @@ static const struct gen_device_info gen_device_info_icl_8x8 = {
.simulator_id = 19,
};
-static const struct gen_device_info gen_device_info_icl_6x8 = {
+static const struct gen_device_info gen_device_info_icl_gt1_5 = {
GEN11_FEATURES(1, 1, subslices(6), 6),
.urb = {
.size = 768,
@@ -931,7 +931,7 @@ static const struct gen_device_info gen_device_info_icl_6x8 = {
.simulator_id = 19,
};
-static const struct gen_device_info gen_device_info_icl_4x8 = {
+static const struct gen_device_info gen_device_info_icl_gt1 = {
GEN11_FEATURES(1, 1, subslices(4), 6),
.urb = {
.size = 768,
@@ -940,7 +940,7 @@ static const struct gen_device_info gen_device_info_icl_4x8 = {
.simulator_id = 19,
};
-static const struct gen_device_info gen_device_info_icl_1x8 = {
+static const struct gen_device_info gen_device_info_icl_gt0_5 = {
GEN11_FEATURES(1, 1, subslices(1), 6),
.urb = {
.size = 768,
@@ -949,7 +949,7 @@ static const struct gen_device_info gen_device_info_icl_1x8 = {
.simulator_id = 19,
};
-static const struct gen_device_info gen_device_info_ehl_4x8 = {
+static const struct gen_device_info gen_device_info_ehl_7 = {
GEN11_FEATURES(1, 1, subslices(4), 4),
.is_elkhartlake = true,
.urb = {
@@ -969,7 +969,7 @@ static const struct gen_device_info gen_device_info_ehl_4x8 = {
.simulator_id = 28,
};
-static const struct gen_device_info gen_device_info_ehl_4x6 = {
+static const struct gen_device_info gen_device_info_ehl_6 = {
GEN11_FEATURES(1, 1, subslices(4), 4),
.is_elkhartlake = true,
.urb = {
@@ -990,7 +990,7 @@ static const struct gen_device_info gen_device_info_ehl_4x6 = {
.simulator_id = 28,
};
-static const struct gen_device_info gen_device_info_ehl_4x4 = {
+static const struct gen_device_info gen_device_info_ehl_5 = {
GEN11_FEATURES(1, 1, subslices(4), 4),
.is_elkhartlake = true,
.urb = {
@@ -1011,7 +1011,7 @@ static const struct gen_device_info gen_device_info_ehl_4x4 = {
.simulator_id = 28,
};
-static const struct gen_device_info gen_device_info_ehl_2x4 = {
+static const struct gen_device_info gen_device_info_ehl_4 = {
GEN11_FEATURES(1, 1, subslices(2), 4),
.is_elkhartlake = true,
.urb = {
@@ -1071,11 +1071,11 @@ static const struct gen_device_info gen_device_info_ehl_2x4 = {
#define dual_subslices(args...) { args, }
-static const struct gen_device_info gen_device_info_tgl_1x2x16 = {
+static const struct gen_device_info gen_device_info_tgl_gt1 = {
GEN12_FEATURES(1, 1, dual_subslices(2), 8),
};
-static const struct gen_device_info gen_device_info_tgl_1x6x16 = {
+static const struct gen_device_info gen_device_info_tgl_gt2 = {
GEN12_FEATURES(2, 1, dual_subslices(6), 8),
};
@@ -1294,7 +1294,7 @@ gen_get_device_info_from_pci_id(int pci_id,
{
switch (pci_id) {
#undef CHIPSET
-#define CHIPSET(id, family, name) \
+#define CHIPSET(id, family, fam_str, name) \
case id: *devinfo = gen_device_info_##family; break;
#include "pci_ids/i965_pci_ids.h"
#include "pci_ids/iris_pci_ids.h"
@@ -1348,7 +1348,7 @@ gen_get_device_name(int devid)
{
switch (devid) {
#undef CHIPSET
-#define CHIPSET(id, family, name) case id: return name;
+#define CHIPSET(id, family, fam_str, name) case id: return name " (" fam_str ")"; break;
#include "pci_ids/i965_pci_ids.h"
#include "pci_ids/iris_pci_ids.h"
default:
diff --git a/src/intel/dev/gen_device_info_test.c b/src/intel/dev/gen_device_info_test.c
index bb50fc67b0f..a47d8155861 100644
--- a/src/intel/dev/gen_device_info_test.c
+++ b/src/intel/dev/gen_device_info_test.c
@@ -13,7 +13,7 @@ main(int argc, char *argv[])
const char *name;
} chipsets[] = {
#undef CHIPSET
-#define CHIPSET(id, family, str_name) { .pci_id = id, .name = str_name, },
+#define CHIPSET(id, family, family_str, str_name) { .pci_id = id, .name = str_name, },
#include "pci_ids/i965_pci_ids.h"
#include "pci_ids/iris_pci_ids.h"
};
diff --git a/src/loader/pci_id_driver_map.h b/src/loader/pci_id_driver_map.h
index f5fc349c1cc..9b4618e1601 100644
--- a/src/loader/pci_id_driver_map.h
+++ b/src/loader/pci_id_driver_map.h
@@ -15,7 +15,7 @@ static const int i915_chip_ids[] = {
};
static const int i965_chip_ids[] = {
-#define CHIPSET(chip, family, name) chip,
+#define CHIPSET(chip, family, family_str, name) chip,
#include "pci_ids/i965_pci_ids.h"
#undef CHIPSET
};