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authorMarek Olšák <marek.olsak@amd.com>2021-01-09 05:48:28 -0500
committerMarge Bot <eric+marge@anholt.net>2021-01-20 21:53:13 +0000
commit88a02d80deb896f3f07d4172391bf597441852e3 (patch)
tree190e6943cfbe45ac4586ba069dbdcefcd1d55fe0
parent581a96bc449f3542599499d43d5df683258262c7 (diff)
radeonsi: don't set context_roll for non-gfx9 in templated functions
It's not needed by other chips. Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8600>
-rw-r--r--src/gallium/drivers/radeonsi/si_state_draw.cpp9
1 files changed, 5 insertions, 4 deletions
diff --git a/src/gallium/drivers/radeonsi/si_state_draw.cpp b/src/gallium/drivers/radeonsi/si_state_draw.cpp
index 6c1992e2a3c..bd80ff8f4f9 100644
--- a/src/gallium/drivers/radeonsi/si_state_draw.cpp
+++ b/src/gallium/drivers/radeonsi/si_state_draw.cpp
@@ -730,7 +730,7 @@ static unsigned si_conv_prim_to_gs_out(unsigned mode)
}
/* rast_prim is the primitive type after GS. */
-template<si_has_gs HAS_GS, si_has_ngg NGG> ALWAYS_INLINE
+template<chip_class GFX_VERSION, si_has_gs HAS_GS, si_has_ngg NGG> ALWAYS_INLINE
static void si_emit_rasterizer_prim_state(struct si_context *sctx)
{
struct radeon_cmdbuf *cs = &sctx->gfx_cs;
@@ -758,7 +758,7 @@ static void si_emit_rasterizer_prim_state(struct si_context *sctx)
sctx->last_gs_out_prim = gs_out_prim;
}
- if (initial_cdw != cs->current.cdw)
+ if (GFX_VERSION == GFX9 && initial_cdw != cs->current.cdw)
sctx->context_roll = true;
if (NGG) {
@@ -945,7 +945,8 @@ static void si_emit_draw_registers(struct si_context *sctx,
if (si_prim_restart_index_changed(sctx, primitive_restart, restart_index)) {
radeon_set_context_reg(cs, R_02840C_VGT_MULTI_PRIM_IB_RESET_INDX, restart_index);
sctx->last_restart_index = restart_index;
- sctx->context_roll = true;
+ if (GFX_VERSION == GFX9)
+ sctx->context_roll = true;
}
}
@@ -1476,7 +1477,7 @@ static void si_emit_all_states(struct si_context *sctx, const struct pipe_draw_i
{
unsigned num_patches = 0;
- si_emit_rasterizer_prim_state<HAS_GS, NGG>(sctx);
+ si_emit_rasterizer_prim_state<GFX_VERSION, HAS_GS, NGG>(sctx);
if (HAS_TESS)
si_emit_derived_tess_state(sctx, info->vertices_per_patch, &num_patches);