diff options
| author | Francisco Jerez <currojerez@riseup.net> | 2015-02-03 20:34:39 +0200 |
|---|---|---|
| committer | Francisco Jerez <currojerez@riseup.net> | 2015-02-10 19:09:25 +0200 |
| commit | 78e9043475d4bed8b50f7e413963c960fa0935bb (patch) | |
| tree | 63645cb2441c8713580d5eb2eabf449c698a4248 | |
| parent | 530445330b403d835a4027b41388b5eea8c2e1ab (diff) | |
i965/vec4: Add register classes up to MAX_VGRF_SIZE.
In preparation for some send from GRF instructions that will require
larger payloads.
Reviewed-by: Matt Turner <mattst88@gmail.com>
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_fs.h | 3 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_shader.h | 3 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp | 10 |
3 files changed, 9 insertions, 7 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_fs.h b/src/mesa/drivers/dri/i965/brw_fs.h index ba4417128be..bce9f7a8737 100644 --- a/src/mesa/drivers/dri/i965/brw_fs.h +++ b/src/mesa/drivers/dri/i965/brw_fs.h @@ -52,9 +52,6 @@ extern "C" { #include "glsl/nir/nir.h" #include "program/sampler.h" -#define MAX_SAMPLER_MESSAGE_SIZE 11 -#define MAX_VGRF_SIZE 16 - struct bblock_t; namespace { struct acp_entry; diff --git a/src/mesa/drivers/dri/i965/brw_shader.h b/src/mesa/drivers/dri/i965/brw_shader.h index 281d5ee0c12..4b5c57364e8 100644 --- a/src/mesa/drivers/dri/i965/brw_shader.h +++ b/src/mesa/drivers/dri/i965/brw_shader.h @@ -33,6 +33,9 @@ #pragma once +#define MAX_SAMPLER_MESSAGE_SIZE 11 +#define MAX_VGRF_SIZE 16 + enum PACKED register_file { BAD_FILE, GRF, diff --git a/src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp b/src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp index b944d454df6..80735c33c91 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp @@ -102,8 +102,11 @@ brw_vec4_alloc_reg_set(struct intel_screen *screen) * SEND-from-GRF sources cannot be split, so we also need classes for each * potential message length. */ - const int class_count = 2; - const int class_sizes[class_count] = {1, 2}; + const int class_count = MAX_VGRF_SIZE; + int class_sizes[MAX_VGRF_SIZE]; + + for (int i = 0; i < class_count; i++) + class_sizes[i] = i + 1; /* Compute the total number of registers across all classes. */ int ra_reg_count = 0; @@ -194,8 +197,7 @@ vec4_visitor::reg_allocate() for (unsigned i = 0; i < alloc.count; i++) { int size = this->alloc.sizes[i]; - assert(size >= 1 && size <= 2 && - "Register allocation relies on split_virtual_grfs()."); + assert(size >= 1 && size <= MAX_VGRF_SIZE); ra_set_node_class(g, i, screen->vec4_reg_set.classes[size - 1]); for (unsigned j = 0; j < i; j++) { |