diff options
author | Christian Gmeiner <cgmeiner@igalia.com> | 2024-03-06 15:41:49 +0100 |
---|---|---|
committer | Marge Bot <emma+marge@anholt.net> | 2024-03-25 10:27:50 +0000 |
commit | 6b1456ccdbccedaa3342fd1a7a0a6fbba26df49b (patch) | |
tree | e6402ea3b121513860ca8e0e4194bfe53d2da76a | |
parent | 846d4988ce930de925529b682eff6e2e81e50297 (diff) |
etnaviv: Remove isa.xml.h
We are using etnaviv.xml to describe our isa and generated all the
needed files.
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28183>
-rw-r--r-- | src/gallium/drivers/etnaviv/etnaviv_asm.h | 1 | ||||
-rw-r--r-- | src/gallium/drivers/etnaviv/hw/.gitignore | 1 | ||||
-rw-r--r-- | src/gallium/drivers/etnaviv/hw/isa.xml.h | 322 | ||||
-rw-r--r-- | src/gallium/drivers/etnaviv/meson.build | 1 |
4 files changed, 1 insertions, 324 deletions
diff --git a/src/gallium/drivers/etnaviv/etnaviv_asm.h b/src/gallium/drivers/etnaviv/etnaviv_asm.h index 5953b0fa67a..22754fcb554 100644 --- a/src/gallium/drivers/etnaviv/etnaviv_asm.h +++ b/src/gallium/drivers/etnaviv/etnaviv_asm.h @@ -30,7 +30,6 @@ #include <stdint.h> #include <stdbool.h> #include "util/u_math.h" -#include "hw/isa.xml.h" #include <etnaviv/isa/asm.h> diff --git a/src/gallium/drivers/etnaviv/hw/.gitignore b/src/gallium/drivers/etnaviv/hw/.gitignore new file mode 100644 index 00000000000..5389714b7cd --- /dev/null +++ b/src/gallium/drivers/etnaviv/hw/.gitignore @@ -0,0 +1 @@ +isa.xml.h diff --git a/src/gallium/drivers/etnaviv/hw/isa.xml.h b/src/gallium/drivers/etnaviv/hw/isa.xml.h deleted file mode 100644 index e6141cee909..00000000000 --- a/src/gallium/drivers/etnaviv/hw/isa.xml.h +++ /dev/null @@ -1,322 +0,0 @@ -#ifndef ISA_XML -#define ISA_XML - -/* Autogenerated file, DO NOT EDIT manually! - -This file was generated by the rules-ng-ng headergen tool in this git repository: -http://0x04.net/cgit/index.cgi/rules-ng-ng -git clone git://0x04.net/rules-ng-ng - -The rules-ng-ng source files this header was generated from are: -- isa.xml ( 39261 bytes, from 2024-01-19 15:52:43) -- copyright.xml ( 1597 bytes, from 2022-05-20 05:37:53) - -Copyright (C) 2012-2024 by the following authors: -- Wladimir J. van der Laan <laanwj@gmail.com> -- Christian Gmeiner <christian.gmeiner@gmail.com> -- Lucas Stach <l.stach@pengutronix.de> -- Russell King <rmk@arm.linux.org.uk> - -Permission is hereby granted, free of charge, to any person obtaining a -copy of this software and associated documentation files (the "Software"), -to deal in the Software without restriction, including without limitation -the rights to use, copy, modify, merge, publish, distribute, sub license, -and/or sell copies of the Software, and to permit persons to whom the -Software is furnished to do so, subject to the following conditions: - -The above copyright notice and this permission notice (including the -next paragraph) shall be included in all copies or substantial portions -of the Software. - -THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR -IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, -FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL -THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER -LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING -FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER -DEALINGS IN THE SOFTWARE. -*/ - - -#define INST_OPCODE_NOP 0x00000000 -#define INST_OPCODE_ADD 0x00000001 -#define INST_OPCODE_MAD 0x00000002 -#define INST_OPCODE_MUL 0x00000003 -#define INST_OPCODE_DST 0x00000004 -#define INST_OPCODE_DP3 0x00000005 -#define INST_OPCODE_DP4 0x00000006 -#define INST_OPCODE_DSX 0x00000007 -#define INST_OPCODE_DSY 0x00000008 -#define INST_OPCODE_MOV 0x00000009 -#define INST_OPCODE_MOVAR 0x0000000a -#define INST_OPCODE_MOVAF 0x0000000b -#define INST_OPCODE_RCP 0x0000000c -#define INST_OPCODE_RSQ 0x0000000d -#define INST_OPCODE_LITP 0x0000000e -#define INST_OPCODE_SELECT 0x0000000f -#define INST_OPCODE_SET 0x00000010 -#define INST_OPCODE_EXP 0x00000011 -#define INST_OPCODE_LOG 0x00000012 -#define INST_OPCODE_FRC 0x00000013 -#define INST_OPCODE_CALL 0x00000014 -#define INST_OPCODE_RET 0x00000015 -#define INST_OPCODE_BRANCH 0x00000016 -#define INST_OPCODE_TEXKILL 0x00000017 -#define INST_OPCODE_TEXLD 0x00000018 -#define INST_OPCODE_TEXLDB 0x00000019 -#define INST_OPCODE_TEXLDD 0x0000001a -#define INST_OPCODE_TEXLDL 0x0000001b -#define INST_OPCODE_TEXLDPCF 0x0000001c -#define INST_OPCODE_REP 0x0000001d -#define INST_OPCODE_ENDREP 0x0000001e -#define INST_OPCODE_LOOP 0x0000001f -#define INST_OPCODE_ENDLOOP 0x00000020 -#define INST_OPCODE_SQRT 0x00000021 -#define INST_OPCODE_SIN 0x00000022 -#define INST_OPCODE_COS 0x00000023 -#define INST_OPCODE_BRANCH2 0x00000024 -#define INST_OPCODE_FLOOR 0x00000025 -#define INST_OPCODE_CEIL 0x00000026 -#define INST_OPCODE_SIGN 0x00000027 -#define INST_OPCODE_ADDLO 0x00000028 -#define INST_OPCODE_MULLO 0x00000029 -#define INST_OPCODE_BARRIER 0x0000002a -#define INST_OPCODE_SWIZZLE 0x0000002b -#define INST_OPCODE_I2I 0x0000002c -#define INST_OPCODE_I2F 0x0000002d -#define INST_OPCODE_F2I 0x0000002e -#define INST_OPCODE_F2IRND 0x0000002f -#define INST_OPCODE_F2I7 0x00000030 -#define INST_OPCODE_CMP 0x00000031 -#define INST_OPCODE_LOAD 0x00000032 -#define INST_OPCODE_STORE 0x00000033 -#define INST_OPCODE_IMG_LOAD_3D 0x00000034 -#define INST_OPCODE_IMG_STORE_3D 0x00000035 -#define INST_OPCODE_GETMANT 0x00000036 -#define INST_OPCODE_NAN 0x00000037 -#define INST_OPCODE_NEXTAFTER 0x00000038 -#define INST_OPCODE_ROUNDEVEN 0x00000039 -#define INST_OPCODE_ROUNDAWAY 0x0000003a -#define INST_OPCODE_IADDSAT 0x0000003b -#define INST_OPCODE_IMULLO0 0x0000003c -#define INST_OPCODE_IMULLO1 0x0000003d -#define INST_OPCODE_IMULLOSAT0 0x0000003e -#define INST_OPCODE_IMULLOSAT1 0x0000003f -#define INST_OPCODE_IMULHI0 0x00000040 -#define INST_OPCODE_IMULHI1 0x00000041 -#define INST_OPCODE_IMUL0 0x00000042 -#define INST_OPCODE_IMUL1 0x00000043 -#define INST_OPCODE_IDIV0 0x00000044 -#define INST_OPCODE_IDIV1 0x00000045 -#define INST_OPCODE_IDIV2 0x00000046 -#define INST_OPCODE_IDIV3 0x00000047 -#define INST_OPCODE_IMOD0 0x00000048 -#define INST_OPCODE_TEXELFETCH 0x00000049 -#define INST_OPCODE_IMOD2 0x0000004a -#define INST_OPCODE_IMOD3 0x0000004b -#define INST_OPCODE_IMADLO0 0x0000004c -#define INST_OPCODE_IMADLO1 0x0000004d -#define INST_OPCODE_IMADLOSAT0 0x0000004e -#define INST_OPCODE_IMADLOSAT1 0x0000004f -#define INST_OPCODE_IMADHI0 0x00000050 -#define INST_OPCODE_IMADHI1 0x00000051 -#define INST_OPCODE_IMADHISAT0 0x00000052 -#define INST_OPCODE_IMADHISAT1 0x00000053 -#define INST_OPCODE_HALFADD 0x00000054 -#define INST_OPCODE_HALFADDINC 0x00000055 -#define INST_OPCODE_MOVAI 0x00000056 -#define INST_OPCODE_IABS 0x00000057 -#define INST_OPCODE_LEADZERO 0x00000058 -#define INST_OPCODE_LSHIFT 0x00000059 -#define INST_OPCODE_RSHIFT 0x0000005a -#define INST_OPCODE_ROTATE 0x0000005b -#define INST_OPCODE_OR 0x0000005c -#define INST_OPCODE_AND 0x0000005d -#define INST_OPCODE_XOR 0x0000005e -#define INST_OPCODE_NOT 0x0000005f -#define INST_OPCODE_BITSELECT 0x00000060 -#define INST_OPCODE_POPCOUNT 0x00000061 -#define INST_OPCODE_STOREB 0x00000062 -#define INST_OPCODE_RGB2YUV 0x00000063 -#define INST_OPCODE_DIV 0x00000064 -#define INST_OPCODE_ATOM_ADD 0x00000065 -#define INST_OPCODE_ATOM_XCHG 0x00000066 -#define INST_OPCODE_ATOM_CMP_XCHG 0x00000067 -#define INST_OPCODE_ATOM_MIN 0x00000068 -#define INST_OPCODE_ATOM_MAX 0x00000069 -#define INST_OPCODE_ATOM_OR 0x0000006a -#define INST_OPCODE_ATOM_AND 0x0000006b -#define INST_OPCODE_ATOM_XOR 0x0000006c -#define INST_OPCODE_BIT_REV 0x0000006d -#define INST_OPCODE_BYTE_REV 0x0000006e -#define INST_OPCODE_TEXLDLPCF 0x0000006f -#define INST_OPCODE_TEXLDGPCF 0x00000070 -#define INST_OPCODE_PACK 0x00000071 -#define INST_OPCODE_CONV 0x00000072 -#define INST_OPCODE_DP2 0x00000073 -#define INST_OPCODE_NORM_DP2 0x00000074 -#define INST_OPCODE_NORM_DP3 0x00000075 -#define INST_OPCODE_NORM_DP4 0x00000076 -#define INST_OPCODE_NORM_MUL 0x00000077 -#define INST_OPCODE_STORE_ATTR 0x00000078 -#define INST_OPCODE_IMG_LOAD 0x00000079 -#define INST_OPCODE_IMG_STORE 0x0000007a -#define INST_OPCODE_RESTART 0x0000007b -#define INST_OPCODE_NOP7C 0x0000007c -#define INST_OPCODE_NOP7D 0x0000007d -#define INST_OPCODE_NOP7E 0x0000007e -#define INST_OPCODE_NOP7F 0x0000007f -#define INST_CONDITION_TRUE 0x00000000 -#define INST_CONDITION_GT 0x00000001 -#define INST_CONDITION_LT 0x00000002 -#define INST_CONDITION_GE 0x00000003 -#define INST_CONDITION_LE 0x00000004 -#define INST_CONDITION_EQ 0x00000005 -#define INST_CONDITION_NE 0x00000006 -#define INST_CONDITION_AND 0x00000007 -#define INST_CONDITION_OR 0x00000008 -#define INST_CONDITION_XOR 0x00000009 -#define INST_CONDITION_NOT 0x0000000a -#define INST_CONDITION_NZ 0x0000000b -#define INST_CONDITION_GEZ 0x0000000c -#define INST_CONDITION_GZ 0x0000000d -#define INST_CONDITION_LEZ 0x0000000e -#define INST_CONDITION_LZ 0x0000000f -#define INST_RGROUP_TEMP 0x00000000 -#define INST_RGROUP_INTERNAL 0x00000001 -#define INST_RGROUP_UNIFORM_0 0x00000002 -#define INST_RGROUP_UNIFORM_1 0x00000003 -#define INST_RGROUP_TEMP_FP 0x00000004 -#define INST_RGROUP_IMMEDIATE 0x00000007 -#define INST_AMODE_DIRECT 0x00000000 -#define INST_AMODE_ADD_A_X 0x00000001 -#define INST_AMODE_ADD_A_Y 0x00000002 -#define INST_AMODE_ADD_A_Z 0x00000003 -#define INST_AMODE_ADD_A_W 0x00000004 -#define INST_SWIZ_COMP_X 0x00000000 -#define INST_SWIZ_COMP_Y 0x00000001 -#define INST_SWIZ_COMP_Z 0x00000002 -#define INST_SWIZ_COMP_W 0x00000003 -#define INST_TYPE_F32 0x00000000 -#define INST_TYPE_S32 0x00000001 -#define INST_TYPE_S8 0x00000002 -#define INST_TYPE_U16 0x00000003 -#define INST_TYPE_F16 0x00000004 -#define INST_TYPE_S16 0x00000005 -#define INST_TYPE_U32 0x00000006 -#define INST_TYPE_U8 0x00000007 -#define INST_ROUND_MODE_DEFAULT 0x00000000 -#define INST_ROUND_MODE_RTZ 0x00000001 -#define INST_ROUND_MODE_RTNE 0x00000002 -#define INST_COMPS_X 0x00000001 -#define INST_COMPS_Y 0x00000002 -#define INST_COMPS_Z 0x00000004 -#define INST_COMPS_W 0x00000008 -#define INST_SWIZ_X__MASK 0x00000003 -#define INST_SWIZ_X__SHIFT 0 -#define INST_SWIZ_X(x) (((x) << INST_SWIZ_X__SHIFT) & INST_SWIZ_X__MASK) -#define INST_SWIZ_Y__MASK 0x0000000c -#define INST_SWIZ_Y__SHIFT 2 -#define INST_SWIZ_Y(x) (((x) << INST_SWIZ_Y__SHIFT) & INST_SWIZ_Y__MASK) -#define INST_SWIZ_Z__MASK 0x00000030 -#define INST_SWIZ_Z__SHIFT 4 -#define INST_SWIZ_Z(x) (((x) << INST_SWIZ_Z__SHIFT) & INST_SWIZ_Z__MASK) -#define INST_SWIZ_W__MASK 0x000000c0 -#define INST_SWIZ_W__SHIFT 6 -#define INST_SWIZ_W(x) (((x) << INST_SWIZ_W__SHIFT) & INST_SWIZ_W__MASK) -#define VIV_ISA_WORD_0 0x00000000 -#define VIV_ISA_WORD_0_OPCODE__MASK 0x0000003f -#define VIV_ISA_WORD_0_OPCODE__SHIFT 0 -#define VIV_ISA_WORD_0_OPCODE(x) (((x) << VIV_ISA_WORD_0_OPCODE__SHIFT) & VIV_ISA_WORD_0_OPCODE__MASK) -#define VIV_ISA_WORD_0_COND__MASK 0x000007c0 -#define VIV_ISA_WORD_0_COND__SHIFT 6 -#define VIV_ISA_WORD_0_COND(x) (((x) << VIV_ISA_WORD_0_COND__SHIFT) & VIV_ISA_WORD_0_COND__MASK) -#define VIV_ISA_WORD_0_SAT 0x00000800 -#define VIV_ISA_WORD_0_DST_USE 0x00001000 -#define VIV_ISA_WORD_0_DST_AMODE__MASK 0x0000e000 -#define VIV_ISA_WORD_0_DST_AMODE__SHIFT 13 -#define VIV_ISA_WORD_0_DST_AMODE(x) (((x) << VIV_ISA_WORD_0_DST_AMODE__SHIFT) & VIV_ISA_WORD_0_DST_AMODE__MASK) -#define VIV_ISA_WORD_0_DST_REG__MASK 0x007f0000 -#define VIV_ISA_WORD_0_DST_REG__SHIFT 16 -#define VIV_ISA_WORD_0_DST_REG(x) (((x) << VIV_ISA_WORD_0_DST_REG__SHIFT) & VIV_ISA_WORD_0_DST_REG__MASK) -#define VIV_ISA_WORD_0_DST_COMPS__MASK 0x07800000 -#define VIV_ISA_WORD_0_DST_COMPS__SHIFT 23 -#define VIV_ISA_WORD_0_DST_COMPS(x) (((x) << VIV_ISA_WORD_0_DST_COMPS__SHIFT) & VIV_ISA_WORD_0_DST_COMPS__MASK) -#define VIV_ISA_WORD_0_TEX_ID__MASK 0xf8000000 -#define VIV_ISA_WORD_0_TEX_ID__SHIFT 27 -#define VIV_ISA_WORD_0_TEX_ID(x) (((x) << VIV_ISA_WORD_0_TEX_ID__SHIFT) & VIV_ISA_WORD_0_TEX_ID__MASK) - -#define VIV_ISA_WORD_1 0x00000004 -#define VIV_ISA_WORD_1_TEX_AMODE__MASK 0x00000007 -#define VIV_ISA_WORD_1_TEX_AMODE__SHIFT 0 -#define VIV_ISA_WORD_1_TEX_AMODE(x) (((x) << VIV_ISA_WORD_1_TEX_AMODE__SHIFT) & VIV_ISA_WORD_1_TEX_AMODE__MASK) -#define VIV_ISA_WORD_1_RMODE__MASK 0x00000003 -#define VIV_ISA_WORD_1_RMODE__SHIFT 0 -#define VIV_ISA_WORD_1_RMODE(x) (((x) << VIV_ISA_WORD_1_RMODE__SHIFT) & VIV_ISA_WORD_1_RMODE__MASK) -#define VIV_ISA_WORD_1_PMODE 0x00000004 -#define VIV_ISA_WORD_1_TEX_SWIZ__MASK 0x000007f8 -#define VIV_ISA_WORD_1_TEX_SWIZ__SHIFT 3 -#define VIV_ISA_WORD_1_TEX_SWIZ(x) (((x) << VIV_ISA_WORD_1_TEX_SWIZ__SHIFT) & VIV_ISA_WORD_1_TEX_SWIZ__MASK) -#define VIV_ISA_WORD_1_SRC0_USE 0x00000800 -#define VIV_ISA_WORD_1_SRC0_REG__MASK 0x001ff000 -#define VIV_ISA_WORD_1_SRC0_REG__SHIFT 12 -#define VIV_ISA_WORD_1_SRC0_REG(x) (((x) << VIV_ISA_WORD_1_SRC0_REG__SHIFT) & VIV_ISA_WORD_1_SRC0_REG__MASK) -#define VIV_ISA_WORD_1_TYPE_BIT2 0x00200000 -#define VIV_ISA_WORD_1_SRC0_SWIZ__MASK 0x3fc00000 -#define VIV_ISA_WORD_1_SRC0_SWIZ__SHIFT 22 -#define VIV_ISA_WORD_1_SRC0_SWIZ(x) (((x) << VIV_ISA_WORD_1_SRC0_SWIZ__SHIFT) & VIV_ISA_WORD_1_SRC0_SWIZ__MASK) -#define VIV_ISA_WORD_1_SRC0_NEG 0x40000000 -#define VIV_ISA_WORD_1_SRC0_ABS 0x80000000 - -#define VIV_ISA_WORD_2 0x00000008 -#define VIV_ISA_WORD_2_SRC0_AMODE__MASK 0x00000007 -#define VIV_ISA_WORD_2_SRC0_AMODE__SHIFT 0 -#define VIV_ISA_WORD_2_SRC0_AMODE(x) (((x) << VIV_ISA_WORD_2_SRC0_AMODE__SHIFT) & VIV_ISA_WORD_2_SRC0_AMODE__MASK) -#define VIV_ISA_WORD_2_SRC0_RGROUP__MASK 0x00000038 -#define VIV_ISA_WORD_2_SRC0_RGROUP__SHIFT 3 -#define VIV_ISA_WORD_2_SRC0_RGROUP(x) (((x) << VIV_ISA_WORD_2_SRC0_RGROUP__SHIFT) & VIV_ISA_WORD_2_SRC0_RGROUP__MASK) -#define VIV_ISA_WORD_2_SRC1_USE 0x00000040 -#define VIV_ISA_WORD_2_SRC1_REG__MASK 0x0000ff80 -#define VIV_ISA_WORD_2_SRC1_REG__SHIFT 7 -#define VIV_ISA_WORD_2_SRC1_REG(x) (((x) << VIV_ISA_WORD_2_SRC1_REG__SHIFT) & VIV_ISA_WORD_2_SRC1_REG__MASK) -#define VIV_ISA_WORD_2_OPCODE_BIT6 0x00010000 -#define VIV_ISA_WORD_2_SRC1_SWIZ__MASK 0x01fe0000 -#define VIV_ISA_WORD_2_SRC1_SWIZ__SHIFT 17 -#define VIV_ISA_WORD_2_SRC1_SWIZ(x) (((x) << VIV_ISA_WORD_2_SRC1_SWIZ__SHIFT) & VIV_ISA_WORD_2_SRC1_SWIZ__MASK) -#define VIV_ISA_WORD_2_SRC1_NEG 0x02000000 -#define VIV_ISA_WORD_2_SRC1_ABS 0x04000000 -#define VIV_ISA_WORD_2_SRC1_AMODE__MASK 0x38000000 -#define VIV_ISA_WORD_2_SRC1_AMODE__SHIFT 27 -#define VIV_ISA_WORD_2_SRC1_AMODE(x) (((x) << VIV_ISA_WORD_2_SRC1_AMODE__SHIFT) & VIV_ISA_WORD_2_SRC1_AMODE__MASK) -#define VIV_ISA_WORD_2_TYPE_BIT01__MASK 0xc0000000 -#define VIV_ISA_WORD_2_TYPE_BIT01__SHIFT 30 -#define VIV_ISA_WORD_2_TYPE_BIT01(x) (((x) << VIV_ISA_WORD_2_TYPE_BIT01__SHIFT) & VIV_ISA_WORD_2_TYPE_BIT01__MASK) - -#define VIV_ISA_WORD_3 0x0000000c -#define VIV_ISA_WORD_3_SRC1_RGROUP__MASK 0x00000007 -#define VIV_ISA_WORD_3_SRC1_RGROUP__SHIFT 0 -#define VIV_ISA_WORD_3_SRC1_RGROUP(x) (((x) << VIV_ISA_WORD_3_SRC1_RGROUP__SHIFT) & VIV_ISA_WORD_3_SRC1_RGROUP__MASK) -#define VIV_ISA_WORD_3_SRC2_IMM__MASK 0x003fff80 -#define VIV_ISA_WORD_3_SRC2_IMM__SHIFT 7 -#define VIV_ISA_WORD_3_SRC2_IMM(x) (((x) << VIV_ISA_WORD_3_SRC2_IMM__SHIFT) & VIV_ISA_WORD_3_SRC2_IMM__MASK) -#define VIV_ISA_WORD_3_SRC2_USE 0x00000008 -#define VIV_ISA_WORD_3_SRC2_REG__MASK 0x00001ff0 -#define VIV_ISA_WORD_3_SRC2_REG__SHIFT 4 -#define VIV_ISA_WORD_3_SRC2_REG(x) (((x) << VIV_ISA_WORD_3_SRC2_REG__SHIFT) & VIV_ISA_WORD_3_SRC2_REG__MASK) -#define VIV_ISA_WORD_3_SEL_BIT0 0x00002000 -#define VIV_ISA_WORD_3_SRC2_SWIZ__MASK 0x003fc000 -#define VIV_ISA_WORD_3_SRC2_SWIZ__SHIFT 14 -#define VIV_ISA_WORD_3_SRC2_SWIZ(x) (((x) << VIV_ISA_WORD_3_SRC2_SWIZ__SHIFT) & VIV_ISA_WORD_3_SRC2_SWIZ__MASK) -#define VIV_ISA_WORD_3_SRC2_NEG 0x00400000 -#define VIV_ISA_WORD_3_SRC2_ABS 0x00800000 -#define VIV_ISA_WORD_3_SEL_BIT1 0x01000000 -#define VIV_ISA_WORD_3_SRC2_AMODE__MASK 0x0e000000 -#define VIV_ISA_WORD_3_SRC2_AMODE__SHIFT 25 -#define VIV_ISA_WORD_3_SRC2_AMODE(x) (((x) << VIV_ISA_WORD_3_SRC2_AMODE__SHIFT) & VIV_ISA_WORD_3_SRC2_AMODE__MASK) -#define VIV_ISA_WORD_3_SRC2_RGROUP__MASK 0x70000000 -#define VIV_ISA_WORD_3_SRC2_RGROUP__SHIFT 28 -#define VIV_ISA_WORD_3_SRC2_RGROUP(x) (((x) << VIV_ISA_WORD_3_SRC2_RGROUP__SHIFT) & VIV_ISA_WORD_3_SRC2_RGROUP__MASK) -#define VIV_ISA_WORD_3_DST_FULL 0x80000000 - - -#endif /* ISA_XML */ diff --git a/src/gallium/drivers/etnaviv/meson.build b/src/gallium/drivers/etnaviv/meson.build index 11d20e12395..729f3c87ae5 100644 --- a/src/gallium/drivers/etnaviv/meson.build +++ b/src/gallium/drivers/etnaviv/meson.build @@ -22,7 +22,6 @@ files_etnaviv = files( 'hw/cmdstream.xml.h', 'hw/common.xml.h', 'hw/common_3d.xml.h', - 'hw/isa.xml.h', 'hw/state_3d.xml.h', 'hw/state_blt.xml.h', 'hw/state.xml.h', |