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authorFrancisco Jerez <currojerez@riseup.net>2015-07-13 14:50:24 +0300
committerFrancisco Jerez <currojerez@riseup.net>2015-07-21 17:54:00 +0300
commit5f8d9ae5a54961deb02eb52e924a84b99b60f035 (patch)
tree2d02f3e02a270afd7b1073a23cbc7306a9471f7e
parentb298311d517017834841e53b7e641738e6067cdc (diff)
i965/fs: Fix stride for immediate registers.
When the width field was removed from fs_reg the BROADCAST handling code in opt_algebraic() started to miss a number of trivial optimization cases resulting in the ugly indirect-addressing sequence to be emitted unnecessarily for some variable-indexed texturing and UBO loads regardless of one of the sources of BROADCAST being immediate. Apparently the reason was that we were setting the stride field to one for immediates even though they are typically uniform. Width used to be set to one too which is why this optimization used to work previously until the "reg.width == 1" check was removed. The stride field of vector immediates is intentionally left equal to one, because they are strictly speaking not uniform. The assertion in fs_generator makes sure that immediates have the expected stride as consistency check. Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
-rw-r--r--src/mesa/drivers/dri/i965/brw_fs.cpp3
-rw-r--r--src/mesa/drivers/dri/i965/brw_fs_generator.cpp4
2 files changed, 7 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp
index 51ef32c1b6a..f7fdb174efb 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -362,6 +362,7 @@ fs_reg::fs_reg(float f)
init();
this->file = IMM;
this->type = BRW_REGISTER_TYPE_F;
+ this->stride = 0;
this->fixed_hw_reg.dw1.f = f;
}
@@ -371,6 +372,7 @@ fs_reg::fs_reg(int32_t i)
init();
this->file = IMM;
this->type = BRW_REGISTER_TYPE_D;
+ this->stride = 0;
this->fixed_hw_reg.dw1.d = i;
}
@@ -380,6 +382,7 @@ fs_reg::fs_reg(uint32_t u)
init();
this->file = IMM;
this->type = BRW_REGISTER_TYPE_UD;
+ this->stride = 0;
this->fixed_hw_reg.dw1.ud = u;
}
diff --git a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
index bae72167972..7f5ac6b9665 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
@@ -79,6 +79,10 @@ brw_reg_from_fs_reg(fs_inst *inst, fs_reg *reg)
brw_reg = byte_offset(brw_reg, reg->subreg_offset);
break;
case IMM:
+ assert(reg->stride == ((reg->type == BRW_REGISTER_TYPE_V ||
+ reg->type == BRW_REGISTER_TYPE_UV ||
+ reg->type == BRW_REGISTER_TYPE_VF) ? 1 : 0));
+
switch (reg->type) {
case BRW_REGISTER_TYPE_F:
brw_reg = brw_imm_f(reg->fixed_hw_reg.dw1.f);